On Wed, Feb 17, 2021 at 10:14:11PM +0530, Neeraj Upadhyay wrote: > Add the MIDR part number info for the Arm Cortex-A78. > > Signed-off-by: Neeraj Upadhyay <[email protected]> > --- > arch/arm64/include/asm/cputype.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/include/asm/cputype.h > b/arch/arm64/include/asm/cputype.h > index ef5b040..3aced88 100644 > --- a/arch/arm64/include/asm/cputype.h > +++ b/arch/arm64/include/asm/cputype.h > @@ -72,6 +72,7 @@ > #define ARM_CPU_PART_CORTEX_A76 0xD0B > #define ARM_CPU_PART_NEOVERSE_N1 0xD0C > #define ARM_CPU_PART_CORTEX_A77 0xD0D > +#define ARM_CPU_PART_CORTEX_A78 0xD41 > > #define APM_CPU_PART_POTENZA 0x000 > > @@ -109,6 +110,7 @@ > #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A76) > #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_NEOVERSE_N1) > #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A77) > +#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, > ARM_CPU_PART_CORTEX_A78) > #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX) > #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX_81XX) > #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, > CAVIUM_CPU_PART_THUNDERX_83XX)
This usually means there's an erratum to work around. What are you hiding ;) Will
