On 16/02/2021 04.13, Krzysztof Kozlowski wrote:
On Mon, Feb 15, 2021 at 09:17:10PM +0900, Hector Martin wrote:
@@ -389,10 +396,12 @@ static void enable_tx_pio(struct s3c24xx_uart_port 
*ourport)
        ucon = rd_regl(port, S3C2410_UCON);
        ucon &= ~(S3C64XX_UCON_TXMODE_MASK);
        ucon |= S3C64XX_UCON_TXMODE_CPU;
-       wr_regl(port,  S3C2410_UCON, ucon);
/* Unmask Tx interrupt */
        switch (ourport->info->type) {
+       case TYPE_APPLE_S5L:
+               ucon |= APPLE_S5L_UCON_TXTHRESH_ENA_MSK;
+               break;
        case TYPE_S3C6400:
                s3c24xx_clear_bit(port, S3C64XX_UINTM_TXD, S3C64XX_UINTM);
                break;
@@ -401,7 +410,16 @@ static void enable_tx_pio(struct s3c24xx_uart_port 
*ourport)
                break;
        }
+ wr_regl(port, S3C2410_UCON, ucon);

You are now configuring the PIO mode after unmasking interrupt. I don't
think it's a good idea to change the order... and if it were, it
would deserve a separate patch.

For v3 I moved the wr_regl back and just write it again in the TYPE_APPLE_S5L branch; that way, setting the PIO mode and unmasking the interrupt are two discrete operations on S5L, like they are on other types.

        /* Keep all interrupts masked and cleared */
        switch (ourport->info->type) {
+       case TYPE_APPLE_S5L: {

Usually you put TYPE_APPLE at the end of switch, so please keep it
consistent. Can be first or last - just everywhere the same, unless you
have a fall-through on purpose.

Good point, thanks, moved it for v3. It was actually inconsistent in more places, I made all the orders the same (the enum order, and default: always goes at the end).

@@ -2179,6 +2329,32 @@ static int s3c24xx_serial_resume_noirq(struct device 
*dev)
        if (port) {
                /* restore IRQ mask */
                switch (ourport->info->type) {
+               case TYPE_APPLE_S5L: {
+                       unsigned int ucon;
+
+                       clk_prepare_enable(ourport->clk);
+                       if (!IS_ERR(ourport->baudclk))
+                               clk_prepare_enable(ourport->baudclk);

We should start checking the return values of clk operations. I know
that existing code does it only in few places, so basically you are not
making it worse...

Added error checking for these for v3, thanks.

+#define S5L_SERIAL_DRV_DATA ((kernel_ulong_t)&s5l_serial_drv_data)
+#else
+#define S5L_SERIAL_DRV_DATA ((kernel_ulong_t)NULL)
+#endif
+
+

Only one line break.

Fixed in v3.

Thank you for the reviews!

--
Hector Martin ([email protected])
Public Key: https://mrcn.st/pub

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