This will enable temperature reporting for various SoC
components.
Signed-off-by: AngeloGioacchino Del Regno
<[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
.../devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
arch/arm64/boot/dts/qcom/sdm630.dtsi | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 95462e071ab4..cdc2ab662436 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -40,6 +40,7 @@ properties:
- qcom,msm8996-tsens
- qcom,msm8998-tsens
- qcom,sc7180-tsens
+ - qcom,sdm630-tsens
- qcom,sdm845-tsens
- qcom,sm8150-tsens
- qcom,sm8250-tsens
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi
b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index deeb1237e67a..2f35415cefed 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -627,6 +627,17 @@ mnoc: interconnect@1745000 {
<&mmcc AHB_CLK_SRC>;
};
+ tsens: thermal-sensor@10ae000 {
+ compatible = "qcom,sdm630-tsens", "qcom,tsens-v2";
+ reg = <0x010ae000 0x1000>, /* TM */
+ <0x010ad000 0x1000>; /* SROT */
+ #qcom,sensors = <12>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
+ #thermal-sensor-cells = <1>;
+ };
+
tcsr_mutex_regs: syscon@1f40000 {
compatible = "syscon";
reg = <0x01f40000 0x20000>;
--
2.30.1
