On Mon, 1 Mar 2021, Liang, Kan wrote: > https://lore.kernel.org/lkml/[email protected]/ > The patch is an SW workaround for some old CPUs (HSW and earlier), which may > set 0 to the PEBS status. It adds a check in the intel_pmu_drain_pebs_nhm(). > It tries to minimize the impact of the defect by avoiding dropping the PEBS > records which have PEBS status 0. > But, it doesn't correct the PEBS status, which may bring problems, > especially for the large PEBS. > It's possible that all the PEBS records in a large PEBS have the PEBS status > 0. If so, the first get_next_pebs_record_by_bit() in the > __intel_pmu_pebs_event() returns NULL. The at = NULL. Since it's a large PEBS, > the 'count' parameter must > 1. The second get_next_pebs_record_by_bit() will > crash. > > Could you please revert the patch and check whether it fixes your issue?
I've reverted that patch and my test-case no longer triggers the issue. I'll restart a longer fuzzing run to see if any other issues turn up. Thanks, Vince
