tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 280d542f6ffac0e6d65dc267f92191d509b13b64 commit: 2f78788b55baa3410b1ec91a576286abe1ad4d6a ilog2: improve ilog2 for constant arguments date: 3 months ago config: mips-randconfig-m031-20210305 (attached as .config) compiler: mips64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <l...@intel.com>
smatch warnings:
arch/mips/mm/tlbex.c:2599 check_pabits() warn: always true condition '(fillbits
>= ((__builtin_constant_p(0)) ?(((0) < 2) ?0:63 - __builtin_clzll(0)):((4 <=
4)) ?__ilog2_u32(0):__ilog2_u64(0))) => (0-u32max >= 0)'
vim +2599 arch/mips/mm/tlbex.c
c5b367835cfc7a Steven J. Hill 2015-02-26 2569
00bf1c691d082c Paul Burton 2015-09-22 2570 static void check_pabits(void)
00bf1c691d082c Paul Burton 2015-09-22 2571 {
00bf1c691d082c Paul Burton 2015-09-22 2572 unsigned long entry;
00bf1c691d082c Paul Burton 2015-09-22 2573 unsigned pabits,
fillbits;
00bf1c691d082c Paul Burton 2015-09-22 2574
00bf1c691d082c Paul Burton 2015-09-22 2575 if (!cpu_has_rixi ||
!_PAGE_NO_EXEC) {
00bf1c691d082c Paul Burton 2015-09-22 2576 /*
00bf1c691d082c Paul Burton 2015-09-22 2577 * We'll only
be making use of the fact that we can rotate bits
00bf1c691d082c Paul Burton 2015-09-22 2578 * into the
fill if the CPU supports RIXI, so don't bother
00bf1c691d082c Paul Burton 2015-09-22 2579 * probing this
for CPUs which don't.
00bf1c691d082c Paul Burton 2015-09-22 2580 */
00bf1c691d082c Paul Burton 2015-09-22 2581 return;
00bf1c691d082c Paul Burton 2015-09-22 2582 }
00bf1c691d082c Paul Burton 2015-09-22 2583
00bf1c691d082c Paul Burton 2015-09-22 2584 write_c0_entrylo0(~0ul);
00bf1c691d082c Paul Burton 2015-09-22 2585
back_to_back_c0_hazard();
00bf1c691d082c Paul Burton 2015-09-22 2586 entry =
read_c0_entrylo0();
00bf1c691d082c Paul Burton 2015-09-22 2587
00bf1c691d082c Paul Burton 2015-09-22 2588 /* clear all non-PFN
bits */
00bf1c691d082c Paul Burton 2015-09-22 2589 entry &= ~((1 <<
MIPS_ENTRYLO_PFN_SHIFT) - 1);
00bf1c691d082c Paul Burton 2015-09-22 2590 entry &=
~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
00bf1c691d082c Paul Burton 2015-09-22 2591
00bf1c691d082c Paul Burton 2015-09-22 2592 /* find a lower bound
on PABITS, and upper bound on fill bits */
00bf1c691d082c Paul Burton 2015-09-22 2593 pabits =
fls_long(entry) + 6;
00bf1c691d082c Paul Burton 2015-09-22 2594 fillbits = max_t(int,
(int)BITS_PER_LONG - pabits, 0);
00bf1c691d082c Paul Burton 2015-09-22 2595
00bf1c691d082c Paul Burton 2015-09-22 2596 /* minus the RI & XI
bits */
00bf1c691d082c Paul Burton 2015-09-22 2597 fillbits -=
min_t(unsigned, fillbits, 2);
00bf1c691d082c Paul Burton 2015-09-22 2598
00bf1c691d082c Paul Burton 2015-09-22 @2599 if (fillbits >=
ilog2(_PAGE_NO_EXEC))
00bf1c691d082c Paul Burton 2015-09-22 2600
fill_includes_sw_bits = true;
00bf1c691d082c Paul Burton 2015-09-22 2601
00bf1c691d082c Paul Burton 2015-09-22 2602 pr_debug("Entry*
registers contain %u fill bits\n", fillbits);
00bf1c691d082c Paul Burton 2015-09-22 2603 }
00bf1c691d082c Paul Burton 2015-09-22 2604
:::::: The code at line 2599 was first introduced by commit
:::::: 00bf1c691d082c1945fdba032c03a9a82e9e7e61 MIPS: tlbex: Avoid placing
software PTE bits in Entry* PFN fields
:::::: TO: Paul Burton <paul.bur...@imgtec.com>
:::::: CC: Ralf Baechle <r...@linux-mips.org>
---
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.config.gz
Description: application/gzip
