On 3/4/2021 5:37 AM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2021-03-03 04:17:47)diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi new file mode 100644 index 0000000..4a56d9c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -0,0 +1,299 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 SoC device tree source + * + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + */ + +#include <dt-bindings/clock/qcom,gcc-sc7280.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + clock-frequency = <76800000>;If this is the correct frequency I think we need to update the rpmh clk driver to use the correct divider? Right now I think it is a 2 when it should be 4?
Looks like this is fixed now [1] [1] https://lore.kernel.org/patchwork/patch/1393159/
+ #clock-cells = <0>; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + };
-- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

