On Sun, Mar 14, 2021 at 01:35:27AM +0100, Borislav Petkov wrote: > On Sat, Mar 13, 2021 at 03:01:18PM +0100, Borislav Petkov wrote: > Yeah, I guess we should keep the bit names in lowercase, for simplicity. > > --- > From: Borislav Petkov <b...@suse.de> > Date: Sat, 13 Mar 2021 14:56:16 +0100 > Subject: [PATCH] tools/x86/kcpuid: Add AMD Secure Encryption leaf > > Add the 0x8000001f leaf's fields. > > Signed-off-by: Borislav Petkov <b...@suse.de>
Acked-by: Feng Tang <feng.t...@intel.com> Thanks! > --- > tools/arch/x86/kcpuid/cpuid.csv | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv > index f4a5b85073f4..dd94c07421a8 100644 > --- a/tools/arch/x86/kcpuid/cpuid.csv > +++ b/tools/arch/x86/kcpuid/cpuid.csv > @@ -378,3 +378,13 @@ > 0x80000008, 0, EAX, 7:0, phy_adr_bits, Physical Address Bits > 0x80000008, 0, EAX, 15:8, lnr_adr_bits, Linear Address Bits > 0x80000007, 0, EBX, 9, wbnoinvd, WBNOINVD > + > +# 8000001F: AMD Secure Encryption > +0x8000001F, 0, EAX, 0, sme, Secure Memory Encryption > +0x8000001F, 0, EAX, 1, sev, Secure Encrypted Virtualization > +0x8000001F, 0, EAX, 2, vmpgflush, VM Page Flush MSR > +0x8000001F, 0, EAX, 3, seves, SEV Encrypted State > +0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory > encryption > +0x8000001F, 0, EBX, 11:6, mem_encrypt_physaddr_width, Reduction of physical > address space in bits with SME enabled > +0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may > be used for an SEV-enabled guest > +0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be > used for an SEV-enabled, SEV-ES-disabled guest > -- > 2.29.2 > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette