Use more generic names (as recommended in the device tree specification
or the binding documentation)

Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ea7416c31f9b..6f4d7929e351 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -769,7 +769,7 @@
                         *      *_HDMI          HDMI
                         *      *_MIPI_*        MIPI
                         */
-                       pd_vio@RK3288_PD_VIO {
+                       power-domain@RK3288_PD_VIO {
                                reg = <RK3288_PD_VIO>;
                                clocks = <&cru ACLK_IEP>,
                                         <&cru ACLK_ISP>,
@@ -811,7 +811,7 @@
                         * Note: The following 3 are HEVC(H.265) clocks,
                         * and on the ACLK_HEVC_NIU (NOC).
                         */
-                       pd_hevc@RK3288_PD_HEVC {
+                       power-domain@RK3288_PD_HEVC {
                                reg = <RK3288_PD_HEVC>;
                                clocks = <&cru ACLK_HEVC>,
                                         <&cru SCLK_HEVC_CABAC>,
@@ -825,7 +825,7 @@
                         * (video endecoder & decoder) clocks that on the
                         * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
                         */
-                       pd_video@RK3288_PD_VIDEO {
+                       power-domain@RK3288_PD_VIDEO {
                                reg = <RK3288_PD_VIDEO>;
                                clocks = <&cru ACLK_VCODEC>,
                                         <&cru HCLK_VCODEC>;
@@ -836,7 +836,7 @@
                         * Note: ACLK_GPU is the GPU clock,
                         * and on the ACLK_GPU_NIU (NOC).
                         */
-                       pd_gpu@RK3288_PD_GPU {
+                       power-domain@RK3288_PD_GPU {
                                reg = <RK3288_PD_GPU>;
                                clocks = <&cru ACLK_GPU>;
                                pm_qos = <&qos_gpu_r>,
-- 
2.17.1



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