This patch provides rsel setting on MT8195.

Signed-off-by: Zhiyong Tao <zhiyong....@mediatek.com>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 22 +++++++++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 14 ++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  | 10 +++++++++
 drivers/pinctrl/mediatek/pinctrl-paris.c      | 16 ++++++++++++++
 4 files changed, 62 insertions(+)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c 
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index a7500e18bb1d..66608b8d346a 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,25 @@ static const struct mtk_pin_field_calc 
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };
 
+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
 static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +812,7 @@ static const struct mtk_pin_reg_calc 
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] = MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
 };
 
 static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -823,6 +843,8 @@ static const struct mtk_pin_soc mt8195_data = {
        .drive_get = mtk_pinconf_drive_get_rev1,
        .adv_drive_get = mtk_pinconf_adv_drive_get_raw,
        .adv_drive_set = mtk_pinconf_adv_drive_set_raw,
+       .rsel_set = mtk_pinconf_rsel_set,
+       .rsel_get = mtk_pinconf_rsel_get,
 };
 
 static const struct of_device_id mt8195_pinctrl_of_match[] = {
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c 
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 2b51f4a9b860..d1526d0c6248 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -1041,6 +1041,20 @@ int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw,
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get_raw);
 
+int mtk_pinconf_rsel_set(struct mtk_pinctrl *hw,
+                        const struct mtk_pin_desc *desc, u32 arg)
+{
+       return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, arg);
+}
+EXPORT_SYMBOL_GPL(mtk_pinconf_rsel_set);
+
+int mtk_pinconf_rsel_get(struct mtk_pinctrl *hw,
+                        const struct mtk_pin_desc *desc, u32 *val)
+{
+       return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, val);
+}
+EXPORT_SYMBOL_GPL(mtk_pinconf_rsel_get);
+
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Sean Wang <sean.w...@mediatek.com>");
 MODULE_DESCRIPTION("Pin configuration library module for mediatek SoCs");
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h 
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index fd5ce9c5dcbd..570e8da7bf38 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -67,6 +67,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };
 
@@ -237,6 +238,10 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc, u32 arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc, u32 *val);
+       int (*rsel_set)(struct mtk_pinctrl *hw,
+                       const struct mtk_pin_desc *desc, u32 arg);
+       int (*rsel_get)(struct mtk_pinctrl *hw,
+                       const struct mtk_pin_desc *desc, u32 *val);
 
        /* Specific driver data */
        void                            *driver_data;
@@ -320,5 +325,10 @@ int mtk_pinconf_adv_drive_set_raw(struct mtk_pinctrl *hw,
 int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw,
                                  const struct mtk_pin_desc *desc, u32 *val);
 
+int mtk_pinconf_rsel_set(struct mtk_pinctrl *hw,
+                        const struct mtk_pin_desc *desc, u32 arg);
+int mtk_pinconf_rsel_get(struct mtk_pinctrl *hw,
+                        const struct mtk_pin_desc *desc, u32 *val);
+
 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n);
 #endif /* __PINCTRL_MTK_COMMON_V2_H */
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c 
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index da1f19288aa6..967288c28232 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -22,6 +22,8 @@
 #define MTK_PIN_CONFIG_PU_ADV  (PIN_CONFIG_END + 3)
 #define MTK_PIN_CONFIG_PD_ADV  (PIN_CONFIG_END + 4)
 #define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5)
+#define MTK_PIN_CONFIG_RSEL    (PIN_CONFIG_END + 6)
+
 
 static const struct pinconf_generic_params mtk_custom_bindings[] = {
        {"mediatek,tdsel",      MTK_PIN_CONFIG_TDSEL,           0},
@@ -29,6 +31,7 @@ static const struct pinconf_generic_params 
mtk_custom_bindings[] = {
        {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV,         1},
        {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV,       1},
        {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2},
+       {"mediatek,rsel",               MTK_PIN_CONFIG_RSEL,    2},
 };
 
 #ifdef CONFIG_DEBUG_FS
@@ -38,6 +41,7 @@ static const struct pin_config_item mtk_conf_items[] = {
        PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
        PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
        PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true),
+       PCONFDUMP(MTK_PIN_CONFIG_RSEL, "rsel", NULL, true),
 };
 #endif
 
@@ -176,6 +180,12 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
                else
                        err = -ENOTSUPP;
                break;
+       case MTK_PIN_CONFIG_RSEL:
+               if (hw->soc->rsel_get)
+                       err = hw->soc->rsel_get(hw, desc, &ret);
+               else
+                       err = -EOPNOTSUPP;
+               break;
        default:
                err = -ENOTSUPP;
        }
@@ -295,6 +305,12 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, 
unsigned int pin,
                else
                        err = -ENOTSUPP;
                break;
+       case MTK_PIN_CONFIG_RSEL:
+               if (hw->soc->rsel_set)
+                       err = hw->soc->rsel_set(hw, desc, arg);
+               else
+                       err = -EOPNOTSUPP;
+               break;
        default:
                err = -ENOTSUPP;
        }
-- 
2.18.0

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