[PATCH v3 1/4] arm64: dts: imx8mq-nitrogen: add USB OTG support

[Adrien Grassein]

Add the description for the USB OTG port.
The OTG port uses a dedicated regulator for vbus.

Signed-off-by: Adrien Grassein <adrien.grass...@gmail.com>
---
 .../boot/dts/freescale/imx8mq-nitrogen.dts    | 35 +++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts 
b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
index 81d269296610..b46f45a82be1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
@@ -34,6 +34,17 @@ power {
                };
        };
 
+       reg_usb_otg_vbus: regulator-usb-otg-vbus {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usbotg_vbus>;
+               regulator-name = "usb_otg_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        reg_vref_0v9: regulator-vref-0v9 {
                compatible = "regulator-fixed";
                regulator-name = "vref-0v9";
@@ -190,6 +201,18 @@ &uart2 {
        status = "okay";
 };
 
+&usb_dwc3_0 {
+       dr_mode = "otg";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usb3_0>;
+       status = "okay";
+};
+
+&usb3_phy0 {
+       vbus-supply = <&reg_usb_otg_vbus>;
+       status = "okay";
+};
+
 &usdhc1 {
        assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
        assigned-clock-rates = <400000000>;
@@ -339,6 +362,12 @@ MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20             0x16
                >;
        };
 
+       pinctrl_reg_usbotg_vbus: reg-usbotg-vbusgrp {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12      0x16
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX             0x45
@@ -353,6 +382,12 @@ MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX                0x45
                >;
        };
 
+       pinctrl_usb3_0: usb3-0grp {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_GPIO1_IO13_USB1_OTG_OC             0x16
+               >;
+       };
+
        pinctrl_usdhc1: usdhc1grp {
                fsl,pins = <
                        MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x83
-- 
2.25.1