Reviewed-by: Rajneesh Bhardwaj <[email protected]> On Wed, Mar 31, 2021 at 11:06 PM David E. Box <[email protected]> wrote: > > From: Gayatri Kammela <[email protected]> > > Modify the low power mode (LPM or sub-state) residency counters to display > in microseconds just like the slp_s0_residency counter. The granularity of > the counter is approximately 30.5us per tick. Double this value then divide > by two to maintain accuracy. > > Signed-off-by: Gayatri Kammela <[email protected]> > Signed-off-by: David E. Box <[email protected]> > --- > drivers/platform/x86/intel_pmc_core.c | 14 ++++++++++++-- > drivers/platform/x86/intel_pmc_core.h | 3 +++ > 2 files changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/platform/x86/intel_pmc_core.c > b/drivers/platform/x86/intel_pmc_core.c > index ce300c2942d0..ba0db301f07b 100644 > --- a/drivers/platform/x86/intel_pmc_core.c > +++ b/drivers/platform/x86/intel_pmc_core.c > @@ -578,6 +578,7 @@ static const struct pmc_reg_map tgl_reg_map = { > .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, > .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED, > .lpm_num_maps = TGL_LPM_NUM_MAPS, > + .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2, > .lpm_en_offset = TGL_LPM_EN_OFFSET, > .lpm_priority_offset = TGL_LPM_PRI_OFFSET, > .lpm_residency_offset = TGL_LPM_RESIDENCY_OFFSET, > @@ -1026,17 +1027,26 @@ static int pmc_core_ltr_show(struct seq_file *s, void > *unused) > } > DEFINE_SHOW_ATTRIBUTE(pmc_core_ltr); > > +static inline u64 adjust_lpm_residency(struct pmc_dev *pmcdev, u32 offset, > + const int lpm_adj_x2) > +{ > + u64 lpm_res = pmc_core_reg_read(pmcdev, offset); > + > + return GET_X2_COUNTER((u64)lpm_adj_x2 * lpm_res); > +} > + > static int pmc_core_substate_res_show(struct seq_file *s, void *unused) > { > struct pmc_dev *pmcdev = s->private; > + const int lpm_adj_x2 = pmcdev->map->lpm_res_counter_step_x2; > u32 offset = pmcdev->map->lpm_residency_offset; > int i, mode; > > seq_printf(s, "%-10s %-15s\n", "Substate", "Residency"); > > pmc_for_each_mode(i, mode, pmcdev) { > - seq_printf(s, "%-10s %-15u\n", pmc_lpm_modes[mode], > - pmc_core_reg_read(pmcdev, offset + (4 * mode))); > + seq_printf(s, "%-10s %-15llu\n", pmc_lpm_modes[mode], > + adjust_lpm_residency(pmcdev, offset + (4 * mode), > lpm_adj_x2)); > } > > return 0; > diff --git a/drivers/platform/x86/intel_pmc_core.h > b/drivers/platform/x86/intel_pmc_core.h > index 5a4e3a49f5b1..3800c1ba6fb7 100644 > --- a/drivers/platform/x86/intel_pmc_core.h > +++ b/drivers/platform/x86/intel_pmc_core.h > @@ -188,9 +188,11 @@ enum ppfear_regs { > #define ICL_PMC_SLP_S0_RES_COUNTER_STEP 0x64 > > #define LPM_MAX_NUM_MODES 8 > +#define GET_X2_COUNTER(v) ((v) >> 1) > > #define TGL_NUM_IP_IGN_ALLOWED 22 > #define TGL_PMC_SLP_S0_RES_COUNTER_STEP 0x7A > +#define TGL_PMC_LPM_RES_COUNTER_STEP_X2 61 /* 30.5us * 2 > */ > > /* > * Tigerlake Power Management Controller register offsets > @@ -263,6 +265,7 @@ struct pmc_reg_map { > const u32 pm_vric1_offset; > /* Low Power Mode registers */ > const int lpm_num_maps; > + const int lpm_res_counter_step_x2; > const u32 lpm_en_offset; > const u32 lpm_priority_offset; > const u32 lpm_residency_offset; > -- > 2.25.1 >
-- Thanks, Rajneesh
