[PATCH v1 7/7] arm64: dts: imx8mm: add power-domains

[Adrien Grassein]

Add description for HSIO and USB power-domains.

Signed-off-by: Adrien Grassein <adrien.grass...@gmail.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 35 +++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index a27e02bee6b4..028b8930db5a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/imx8mm-clock.h>
+#include <dt-bindings/power/imx8mm-power.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -600,6 +601,38 @@ src: reset-controller@30390000 {
                                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                                #reset-cells = <1>;
                        };
+
+                       gpc: gpc@303a0000 {
+                               compatible = "fsl,imx8mm-gpc";
+                               reg = <0x303a0000 0x10000>;
+                               interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-parent = <&gic>;
+                               interrupt-controller;
+                               #interrupt-cells = <3>;
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       pgc_hsiomix: 
power-domain@IMX8MM_POWER_DOMAIN_HSIOMIX {
+                                               #power-domain-cells = <0>;
+                                               reg = 
<IMX8MM_POWER_DOMAIN_HSIOMIX>;
+                                               clocks = <&clk 
IMX8MM_CLK_USB_BUS>;
+                                       };
+
+                                       pgc_usb_otg1: 
power-domain@IMX8MM_POWER_DOMAIN_USB_OTG1 {
+                                               #power-domain-cells = <0>;
+                                               reg = 
<IMX8MM_POWER_DOMAIN_USB_OTG1>;
+                                               power-domains = <&pgc_hsiomix>;
+                                       };
+
+                                       pgc_usb_otg2: 
power-domain@IMX8MM_POWER_DOMAIN_USB_OTG2 {
+                                               #power-domain-cells = <0>;
+                                               reg = 
<IMX8MM_POWER_DOMAIN_USB_OTG2>;
+                                               power-domains = <&pgc_hsiomix>;
+                                       };
+                               };
+                       };
                };
 
                aips2: bus@30400000 {
@@ -953,6 +986,7 @@ usbotg1: usb@32e40000 {
                                assigned-clock-parents = <&clk 
IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop1>;
                                fsl,usbmisc = <&usbmisc1 0>;
+                               power-domains = <&pgc_usb_otg1>;
                                status = "disabled";
                        };
 
@@ -972,6 +1006,7 @@ usbotg2: usb@32e50000 {
                                assigned-clock-parents = <&clk 
IMX8MM_SYS_PLL2_500M>;
                                fsl,usbphy = <&usbphynop2>;
                                fsl,usbmisc = <&usbmisc2 0>;
+                               power-domains = <&pgc_usb_otg2>;
                                status = "disabled";
                        };
 
-- 
2.25.1