Hi catalin, Now I am trying to understand your patch in linux kernel.
.align 5 ENTRY(v6_early_abort) #ifdef CONFIG_CPU_32v6K clrex #else strex r0, r1, [sp] @ Clear the exclusive monitor <====================== This #endif mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR I think that you insert just ""dummy strex"" for preventing unpredicatable state of exclusive monitor. Is right? If it is right, Why do you use r1, [sp] in all of registers ? Is there any issue ? -- Kinds regards, barrios -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
