> +static int nsim_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num)
> +{
> + return 0;
> +}
> +
> +static int nsim_mdio_write(struct mii_bus *bus, int phy_addr, int reg_num,
> + u16 val)
> +{
> + return 0;
> +}
If i'm reading the code correctly, each PHY has its own MDIO bus? And
the PHY is always at address 0?
Maybe for address != 0, these should return -ENODEV?
I'm guessing the PHY core is going to perform reads/writes for things
like EEE? And if the MAC driver has an IOCTL handler, it could also do
reads/writes. So something is needed here, but i do wounder if hard
coded 0 is going to work out O.K? Have you looked at what accesses the
core actually does?
Andrew
