Add required syscon compatible and #power-domain-cells to the APMU
controller. This is required for the SoC's power domain controller as
the registers are shared.
Device tree bindings for said power domains are also added.
Reviewed-by: Rob Herring (Arm) <r...@kernel.org>
Signed-off-by: Duje Mihanović <d...@dujemihanovic.xyz>
---
v3:
- Squash power binding patch
- Update trailers
v2:
- Drop simple-mfd
- Add #power-domain-cells
---
.../devicetree/bindings/clock/marvell,pxa1908.yaml | 30 +++++++++++++++++-----
MAINTAINERS | 1 +
include/dt-bindings/power/marvell,pxa1908-power.h | 17 ++++++++++++
3 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
index
4e78933232b6b925811425f853bedf6e9f01a27d..6f3a8578fe2a6810911fec5879c07c9ddb34565a
100644
--- a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
+++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
@@ -19,11 +19,14 @@ description: |
properties:
compatible:
- enum:
- - marvell,pxa1908-apbc
- - marvell,pxa1908-apbcp
- - marvell,pxa1908-mpmu
- - marvell,pxa1908-apmu
+ oneOf:
+ - enum:
+ - marvell,pxa1908-apbc
+ - marvell,pxa1908-apbcp
+ - marvell,pxa1908-mpmu
+ - items:
+ - const: marvell,pxa1908-apmu
+ - const: syscon
reg:
maxItems: 1
@@ -31,6 +34,9 @@ properties:
'#clock-cells':
const: 1
+ '#power-domain-cells':
+ const: 1
+
required:
- compatible
- reg
@@ -38,11 +44,23 @@ required:
additionalProperties: false
+if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: marvell,pxa1908-apmu
+
+then:
+ properties:
+ '#power-domain-cells': false
+
examples:
# APMU block:
- |
clock-controller@d4282800 {
- compatible = "marvell,pxa1908-apmu";
+ compatible = "marvell,pxa1908-apmu", "syscon";
reg = <0xd4282800 0x400>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
};
diff --git a/MAINTAINERS b/MAINTAINERS
index
fed6cd812d796a08cebc0c1fd540c8901d1bf448..88f7bd50686eb1f6bcd4f34c6827f27ad44ea4e8
100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2872,6 +2872,7 @@ S: Maintained
F: arch/arm64/boot/dts/marvell/mmp/
F: drivers/clk/mmp/clk-pxa1908*.c
F: include/dt-bindings/clock/marvell,pxa1908.h
+F: include/dt-bindings/power/marvell,pxa1908-power.h
ARM/Mediatek RTC DRIVER
M: Eddie Huang <eddie.hu...@mediatek.com>
diff --git a/include/dt-bindings/power/marvell,pxa1908-power.h
b/include/dt-bindings/power/marvell,pxa1908-power.h
new file mode 100644
index
0000000000000000000000000000000000000000..19b088351af138823505a774ff27203429fe2d97
--- /dev/null
+++ b/include/dt-bindings/power/marvell,pxa1908-power.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Marvell PXA1908 power domains
+ *
+ * Copyright 2025, Duje Mihanović <d...@dujemihanovic.xyz>
+ */
+
+#ifndef __DTS_MARVELL_PXA1908_POWER_H
+#define __DTS_MARVELL_PXA1908_POWER_H
+
+#define PXA1908_POWER_DOMAIN_VPU 0
+#define PXA1908_POWER_DOMAIN_GPU 1
+#define PXA1908_POWER_DOMAIN_GPU2D 2
+#define PXA1908_POWER_DOMAIN_DSI 3
+#define PXA1908_POWER_DOMAIN_ISP 4
+
+#endif
--
2.51.0
