Some platforms only differ in HW register offsets, but can share the same API. Refine struct mtk_scp_of_data to allow setting HW register offsets via platform data, enabling better code reuse and easier support for new platforms.
Signed-off-by: Huayu Zong <[email protected]> --- drivers/remoteproc/mtk_common.h | 5 +++++ drivers/remoteproc/mtk_scp.c | 18 ++++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index fd5c539ab2ac..d45480ad332e 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -112,6 +112,11 @@ struct mtk_scp_of_data { u32 host_to_scp_reg; u32 host_to_scp_int_bit; + u32 scp_to_host_ipc_clr_reg; + u32 scp_to_spm_ipc_clr_reg; + + u32 scp_secure_domain_reg; + u32 scp_domain_value; size_t ipi_buf_offset; const struct mtk_scp_sizes_data *scp_sizes; diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 10e3f9eb8cd2..c3c37cae933a 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -236,7 +236,7 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) * MT8192_SCP2APMCU_IPC. */ writel(MT8192_SCP_IPC_INT_BIT, - scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR); + scp->cluster->reg_base + scp->data->scp_to_host_ipc_clr_reg); } else { scp_wdt_handler(scp, scp_to_host); writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ); @@ -561,7 +561,7 @@ static int mt8188_scp_c1_before_load(struct mtk_scp *scp) static int mt8192_scp_before_load(struct mtk_scp *scp) { /* clear SPM interrupt, SCP2SPM_IPC_CLR */ - writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR); + writel(0xff, scp->cluster->reg_base + scp->data->scp_to_spm_ipc_clr_reg); writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET); @@ -575,6 +575,18 @@ static int mt8192_scp_before_load(struct mtk_scp *scp) /* enable MPU for all memory regions */ writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); + /* Set the domain of master in SCP. + * + * In the SCP, cores, DMA, and SPI are masters. When these masters + * access memory or devices, they need to carry a domain ID. This + * domain ID is used to determine whether they have permission to + * access the target device or memory. + */ + + if (scp->data->scp_secure_domain_reg) + writel(scp->data->scp_domain_value, + scp->cluster->reg_base + scp->data->scp_secure_domain_reg); + return 0; } @@ -1527,6 +1539,8 @@ static const struct mtk_scp_of_data mt8192_of_data = { .scp_da_to_va = mt8192_scp_da_to_va, .host_to_scp_reg = MT8192_GIPC_IN_SET, .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, + .scp_to_host_ipc_clr_reg = MT8192_SCP2APMCU_IPC_CLR, + .scp_to_spm_ipc_clr_reg = MT8192_SCP2SPM_IPC_CLR, .scp_sizes = &default_scp_sizes, }; -- 2.45.2
