On 1/26/2026 5:38 PM, Alison Schofield wrote: [snip] ..
+static void process_defer_work(struct work_struct *_work) +{ + struct dax_defer_work *work = container_of(_work, typeof(*work), work); + struct platform_device *pdev = work->pdev; + int rc; + + /* relies on cxl_acpi and cxl_pci having had a chance to load */ + wait_for_device_probe(); + + rc = walk_hmem_resources(&pdev->dev, cxl_contains_soft_reserve); + + if (!rc) { + dax_cxl_mode = DAX_CXL_MODE_DROP; + rc = bus_rescan_devices(&cxl_bus_type); + if (rc) + dev_warn(&pdev->dev, "CXL bus rescan failed: %d\n", rc); + } else { + dax_cxl_mode = DAX_CXL_MODE_REGISTER; + cxl_region_teardown_all();The region teardown appears as a one-shot sweep of existing regions without considering regions not yet assembled. After this point will a newly arriving region, be racing with HMEM again to create a DAX region?
My understanding is that with the probe ordering patches and wait_for_device_probe(), CXL region discovery and assembly should have completed before this point.
Thanks Smita
+ } + + walk_hmem_resources(&pdev->dev, hmem_register_device); +} + +static void kill_defer_work(void *_work) +{ + struct dax_defer_work *work = container_of(_work, typeof(*work), work); + + cancel_work_sync(&work->work); + kfree(work); +} + static int dax_hmem_platform_probe(struct platform_device *pdev) { + struct dax_defer_work *work = kzalloc(sizeof(*work), GFP_KERNEL); + int rc; + + if (!work) + return -ENOMEM; + + work->pdev = pdev; + INIT_WORK(&work->work, process_defer_work); + + rc = devm_add_action_or_reset(&pdev->dev, kill_defer_work, work); + if (rc) + return rc; + + platform_set_drvdata(pdev, work); + return walk_hmem_resources(&pdev->dev, hmem_register_device); }@@ -174,3 +250,4 @@ MODULE_ALIAS("platform:hmem_platform*");MODULE_DESCRIPTION("HMEM DAX: direct access to 'specific purpose' memory"); MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Intel Corporation"); +MODULE_IMPORT_NS("CXL"); -- 2.17.1
