On Sat, Feb 28, 2026 at 5:37 PM Ard Biesheuvel <[email protected]> wrote: > > > > On Sat, 28 Feb 2026, at 10:38, Uros Bizjak wrote: > > On Fri, Feb 27, 2026 at 11:40 PM Ard Biesheuvel <[email protected]> wrote: > ... > >> - asm volatile("movw %%ax, %%ss" : : "a"(ctxt->ss)); > >> - asm volatile("movq %0, %%rsp" : : "m"(ctxt->rsp)); > >> + asm volatile("movw %0, %%ss" : : "m"(hv_crash_ctxt.ss)); > >> + asm volatile("movq %0, %%rsp" : : "m"(hv_crash_ctxt.rsp)); > > > > Maybe this part should be written together as: > > > > asm volatile("movw %0, %%ss\n\t" > > "movq %1, %%rsp" > > :: "m"(hv_crash_ctxt.ss), "m"(hv_crash_ctxt,rsp)); > > > > This way, the stack register update is guaranteed to execute in the > > stack segment shadow. Otherwise, the compiler is free to insert some > > unrelated instruction in between. It probably won't happen in practice > > in this case, but the compiler can be quite creative with moving asm > > arguments around. > > > > It also doesn't matter: setting the SS segment is not needed when running in > 64-bit mode, so whether or not the RSP update occurs immediately after is > irrelevant.
x86-64 still implements the stack segment interrupt shadow for MOV SS and POP SS, even though segmentation is mostly disabled in long mode. Uros.
