On 03/03/2026 10:55, Bryan O'Donoghue wrote:
On 01/03/2026 00:51, David Heidelberg via B4 Relay wrote:
From: David Heidelberg <[email protected]>

These values should improve C-PHY behaviour. Should match most recent
Qualcomm code.

Signed-off-by: David Heidelberg <[email protected]>
---
  .../media/platform/qcom/camss/camss-csiphy-3ph-1-0.c   | 18 +++++++++---------
  1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/ drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index 5482fb5163e17..c612192ee727a 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -225,9 +225,9 @@ csiphy_lane_regs lane_regs_sdm845[] = {
  /* 3 entries: 3 lanes (C-PHY) */
  static const struct
  csiphy_lane_regs lane_regs_sdm845_3ph[] = {
-    {0x015c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x0168, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x016c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x015c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x0168, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x016c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x0104, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x010c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
      {0x0108, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
@@ -245,9 +245,9 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] = {
      {0x0164, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x01dc, 0x51, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x035c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x0368, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x036c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x035c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x0368, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x036c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x0304, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x030c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
      {0x0308, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
@@ -265,9 +265,9 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] = {
      {0x0364, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x03dc, 0x51, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x055c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x0568, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
-    {0x056c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x055c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x0568, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
+    {0x056c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x0504, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
      {0x050c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
      {0x0508, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},


Squash down and Co-developed-by


We don't have any documentation how these lanes are set. I think it's good to see two working variants, someone may need it to demystify it one day and the history may comes handy. Also both variants works for us.

I think it would make sense to squash it, when the magic hex gets documented, but even with description it may be useful to see what's being tuned to get better working C-PHY.

So I would propose intentionally keep here the "history" so someone in the future may use it to describe these registers.

David

---
bod

--
David Heidelberg


Reply via email to