On 2026/3/20 1:07, Kevin Brodsky wrote:
> On 17/03/2026 09:20, Jinjie Ruan wrote:
>> Use the generic TIF bits defined in <asm-generic/thread_info_tif.h> for
>> standard thread flags (TIF_SIGPENDING, TIF_NEED_RESCHED, TIF_NOTIFY_RESUME,
>> TIF_RESTORE_SIGMASK, TIF_SINGLESTEP, etc.) instead of defining
>> them locally.
>>
>> Arm64-specific bits (TIF_FOREIGN_FPSTATE, TIF_MTE_ASYNC_FAULT, TIF_SVE,
>> TIF_SSBD, etc.) are renumbered to start at bit 16 to avoid conflicts.
>>
>> This enables RSEQ optimizations which require CONFIG_HAVE_GENERIC_TIF_BITS
>> combined with the generic entry infrastructure (already used by arm64).
>>
>> Cc: Thomas Gleixner <[email protected]>
>> Signed-off-by: Jinjie Ruan <[email protected]>
>> ---
>> arch/arm64/Kconfig | 1 +
>> arch/arm64/include/asm/thread_info.h | 62 ++++++++++++----------------
>> 2 files changed, 28 insertions(+), 35 deletions(-)
>>
[...]
>> + */
>> +#define HAVE_TIF_NEED_RESCHED_LAZY
>> +#define HAVE_TIF_RESTORE_SIGMASK
>> +#define HAVE_TIF_SINGLESTEP
>> +
>> +#include <asm-generic/thread_info_tif.h>
>> +
>> +#define TIF_FOREIGN_FPSTATE 16 /* CPU's FP state is not current's */
>> +#define TIF_MTE_ASYNC_FAULT 17 /* MTE Asynchronous Tag Check Fault */
>> +#define TIF_FREEZE 18
>
> Turns out this flag became unused a long time ago, see commit
> d88e4cb67197 ("freezer: remove now unused TIF_FREEZE"), and it was
> probably reintroduced by mistake in the original arm64 implementation,
> commit b3901d54dc4f ("arm64: Process management"). Good opportunity to
> remove it I think.
Totally agree. Let's get rid of it. No point in keeping dead code.
Thanks for the review.
>
> Otherwise:
>
> Reviewed-by: Kevin Brodsky <[email protected]>
>
>> +#define TIF_32BIT 19 /* 32bit process */
>> +#define TIF_SVE 20 /* Scalable Vector Extension in
>> use */
>> +#define TIF_SVE_VL_INHERIT 21 /* Inherit SVE vl_onexec across exec */
>> +#define TIF_SSBD 22 /* Wants SSB mitigation */
>> +#define TIF_TAGGED_ADDR 23 /* Allow tagged user addresses
>> */
>> +#define TIF_SME 24 /* SME in use */
>> +#define TIF_SME_VL_INHERIT 25 /* Inherit SME vl_onexec across exec */
>> +#define TIF_KERNEL_FPSTATE 26 /* Task is in a kernel mode FPSIMD
>> section */
>> +#define TIF_TSC_SIGSEGV 27 /* SIGSEGV on counter-timer
>> access */
>> +#define TIF_LAZY_MMU_PENDING 28 /* Ops pending for lazy mmu
>> mode exit */
>>
>> -#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
>> -#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
>> -#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY)
>> -#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
>> -#define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE)
>> -#define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING)
>> -#define _TIF_UPROBE (1 << TIF_UPROBE)
>> -#define _TIF_32BIT (1 << TIF_32BIT)
>> -#define _TIF_SVE (1 << TIF_SVE)
>> -#define _TIF_MTE_ASYNC_FAULT (1 << TIF_MTE_ASYNC_FAULT)
>> -#define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL)
>> -#define _TIF_TSC_SIGSEGV (1 << TIF_TSC_SIGSEGV)
>> +#define _TIF_FOREIGN_FPSTATE BIT(TIF_FOREIGN_FPSTATE)
>> +#define _TIF_32BIT BIT(TIF_32BIT)
>> +#define _TIF_SVE BIT(TIF_SVE)
>> +#define _TIF_MTE_ASYNC_FAULT BIT(TIF_MTE_ASYNC_FAULT)
>> +#define _TIF_TSC_SIGSEGV BIT(TIF_TSC_SIGSEGV)
>>
>> #ifdef CONFIG_SHADOW_CALL_STACK
>> #define INIT_SCS \
>
