Remove the top_ahb/axi clocks from QCM2290 subdevice clock lists. These clocks are now handled centrally as a global CAMSS PM clock and are automatically enabled when any CAMSS child is active.
This avoids redundant clock references in individual subdevices and ensures consistent clock management across the CAMSS pipeline. Signed-off-by: Loic Poulain <[email protected]> --- drivers/media/platform/qcom/camss/camss.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index b2b0afc3fb5f597622f9b4ebfee2ec6703bf0890..1fa42565c28a8cd461771821518875a8f468834c 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -664,9 +664,8 @@ static const struct camss_subdev_resources csiphy_res_2290[] = { /* CSIPHY0 */ { .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, - .clock = { "top_ahb", "ahb", "csiphy0", "csiphy0_timer" }, + .clock = { "ahb", "csiphy0", "csiphy0_timer" }, .clock_rate = { { 0 }, - { 0 }, { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg = { "csiphy0" }, @@ -681,9 +680,8 @@ static const struct camss_subdev_resources csiphy_res_2290[] = { /* CSIPHY1 */ { .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" }, - .clock = { "top_ahb", "ahb", "csiphy1", "csiphy1_timer" }, + .clock = { "ahb", "csiphy1", "csiphy1_timer" }, .clock_rate = { { 0 }, - { 0 }, { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg = { "csiphy1" }, @@ -700,9 +698,8 @@ static const struct camss_subdev_resources csid_res_2290[] = { /* CSID0 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "csi0", "vfe0_cphy_rx", "vfe0" }, + .clock = { "ahb", "csi0", "vfe0_cphy_rx", "vfe0" }, .clock_rate = { { 0 }, - { 0 }, { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, @@ -718,9 +715,8 @@ static const struct camss_subdev_resources csid_res_2290[] = { /* CSID1 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "csi1", "vfe1_cphy_rx", "vfe1" }, - .clock_rate = { { 0 }, - { 0 }, + .clock = { "ahb", "csi1", "vfe1_cphy_rx", "vfe1" }, + .clock_rate = { { 0 }, { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, @@ -738,10 +734,8 @@ static const struct camss_subdev_resources vfe_res_2290[] = { /* VFE0 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "axi", "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock = { "ahb", "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" }, .clock_rate = { { 0 }, - { 0 }, - { 0 }, { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, { 0 }, { 0 }, }, @@ -758,10 +752,8 @@ static const struct camss_subdev_resources vfe_res_2290[] = { /* VFE1 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "axi", "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock = { "ahb", "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" }, .clock_rate = { { 0 }, - { 0 }, - { 0 }, { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, { 0 }, { 0 }, }, -- 2.34.1
