On Thu, 7 May 2026 21:21:01 -0700 Boqun Feng <[email protected]> wrote:
> From: Boqun Feng <[email protected]> > > In order to support preempt_disable()-like interrupt disabling, that is, > using part of preempt_count() to track interrupt disabling nested level, > change the preempt_count() layout to contain 8-bit HARDIRQ_DISABLE > count. > > Note that HARDIRQ_BITS and NMI_BITS are reduced by 1 because of this, > and it changes the maximum of their (hardirq and nmi) nesting level. > > Signed-off-by: Boqun Feng <[email protected]> > Signed-off-by: Lyude Paul <[email protected]> > Signed-off-by: Boqun Feng <[email protected]> > Link: https://patch.msgid.link/[email protected] > --- > include/linux/preempt.h | 16 +++++++++++----- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/include/linux/preempt.h b/include/linux/preempt.h > index d964f965c8ff..f07e7f37f3ca 100644 > --- a/include/linux/preempt.h > +++ b/include/linux/preempt.h > @@ -17,6 +17,7 @@ > * > * - bits 0-7 are the preemption count (max preemption depth: 256) > * - bits 8-15 are the softirq count (max # of softirqs: 256) > + * - bits 16-23 are the hardirq disable count (max # of hardirq disable: 256) > * > * The hardirq count could in theory be the same as the number of > * interrupts in the system, but we run all interrupt handlers with > @@ -26,29 +27,34 @@ > * > * PREEMPT_MASK: 0x000000ff > * SOFTIRQ_MASK: 0x0000ff00 > - * HARDIRQ_MASK: 0x000f0000 > - * NMI_MASK: 0x00f00000 > + * HARDIRQ_DISABLE_MASK: 0x00ff0000 > + * HARDIRQ_MASK: 0x07000000 > + * NMI_MASK: 0x38000000 I wonder if you should switch patch 1 and 2 and move the NMI bits out first. That way you avoid the side effect of this patch shrinking the NMI nest count from 15 to 7. It may not matter, but I hate when a patch introduces a side effect like this. -- Steve > * PREEMPT_NEED_RESCHED: 0x80000000 > */ > #define PREEMPT_BITS 8 > #define SOFTIRQ_BITS 8 > -#define HARDIRQ_BITS 4 > -#define NMI_BITS 4 > +#define HARDIRQ_DISABLE_BITS 8 > +#define HARDIRQ_BITS 3 > +#define NMI_BITS 3 >
