* Andi Kleen <[EMAIL PROTECTED]> wrote:
> This is more idiomatic and it does not really make sense for this code
> to implement a own TLB flushing variant.
>
> The control registers will be read/written a few times more, but that
> should not really matter for this code.
what you do not point out in the changelog, and what i've mentioned to
you in past replies but you still ignore it: that the patch changes what
the code does - we now keep PGE enabled in cr4 during the MTRR changing.
the MTRR code is historically fragile, rarely triggered code, laced with
CPU errata. The change brings us absolutely nothing (it in fact
increases the code size a bit) and it is just not worth the risk at this
stage.
Ingo
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