On Fri, 29 May 2026, Richard Cheng wrote: > aarch64 has no vendor_id in /proc/cpuinfo, so detect_vendor() returns 0 > and arch_supports_noncont_cat() falls through to "return false". > L3_NONCONT_CAT therefore spuriously fails on every ARM MPAM platform. > > Define ARCH_ARM, short-circuit detect_vendor() to it on aarch64, and > add it to the AMD/Hygon always-supports early-out in > arch_supports_noncont_cat(). > > aarch64 has many implementers (ARM 0x41, NVIDIA 0x43, etc.), but MPAM > mandates non-contiguous CPBM uniformly, so per-implementer handling is > not needed here. > > Signed-off-by: Richard Cheng <[email protected]> > --- > tools/testing/selftests/resctrl/cat_test.c | 9 ++++++-- > tools/testing/selftests/resctrl/resctrl.h | 1 + > .../testing/selftests/resctrl/resctrl_tests.c | 21 +++++++++++++++++++ > 3 files changed, 29 insertions(+), 2 deletions(-) > > diff --git a/tools/testing/selftests/resctrl/cat_test.c > b/tools/testing/selftests/resctrl/cat_test.c > index dc414e55ae94..ce66016dbd88 100644 > --- a/tools/testing/selftests/resctrl/cat_test.c > +++ b/tools/testing/selftests/resctrl/cat_test.c > @@ -292,8 +292,13 @@ static bool arch_supports_noncont_cat(const struct > resctrl_test *test) > { > unsigned int vendor_id = get_vendor(); > > - /* AMD and Hygon always support non-contiguous CBM. */ > - if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON) > + /* > + * AMD and Hygon always support non-contiguous CBM. ARM/MPAM defines > + * MPAMCFG_CPBM as a bitmap with no contiguity constraint per ARM > + * DDI 0598. > + */ > + if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON || > + vendor_id == ARCH_ARM) > return true; > > #if defined(__i386__) || defined(__x86_64__) /* arch */ > diff --git a/tools/testing/selftests/resctrl/resctrl.h > b/tools/testing/selftests/resctrl/resctrl.h > index afe635b6e48d..670e5b128b4d 100644 > --- a/tools/testing/selftests/resctrl/resctrl.h > +++ b/tools/testing/selftests/resctrl/resctrl.h > @@ -40,6 +40,7 @@ > #define ARCH_INTEL BIT(0) > #define ARCH_AMD BIT(1) > #define ARCH_HYGON BIT(2) > +#define ARCH_ARM BIT(3) > > #define END_OF_TESTS 1 > > diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c > b/tools/testing/selftests/resctrl/resctrl_tests.c > index dbcd5eea9fbc..cfece594a8c6 100644 > --- a/tools/testing/selftests/resctrl/resctrl_tests.c > +++ b/tools/testing/selftests/resctrl/resctrl_tests.c > @@ -23,6 +23,15 @@ static struct resctrl_test *resctrl_tests[] = { > &l2_noncont_cat_test, > }; > > +static bool detect_aarch64(void) > +{ > +#if defined(__aarch64__) > + return true; > +#else > + return false; > +#endif > +} > + > static unsigned int detect_vendor(void) > { > static unsigned int vendor_id; > @@ -34,6 +43,18 @@ static unsigned int detect_vendor(void) > if (initialized) > return vendor_id; > > + if (detect_aarch64()) { > + /* > + * aarch64 has no userspace vendor_id in /proc/cpuinfo. > + * MPAM-capable ARM implementations follow ARM DDI 0598; > + * treat all aarch64 builds as a single vendor for the > + * purposes of resctrl selftests. > + */ > + vendor_id = ARCH_ARM; > + initialized = true; > + return vendor_id; > + } > + > inf = fopen("/proc/cpuinfo", "r"); > if (!inf) { > vendor_id = 0; >
Reviewed-by: Ilpo Järvinen <[email protected]> -- i.
