From: Frank Li <[email protected]>

Commercial users and hardware vendors migrated to Zephyr or other RTOS
solutions years ago, leaving the NOMMU platform support effectively
unused and unmaintained.

Remove the obsolete support to reduce maintenance burden and simplify the
i.MX platform code.

Signed-off-by: Frank Li <[email protected]>
---
 .../devicetree/bindings/pinctrl/fsl,imxrt1050.yaml |  79 -----
 .../devicetree/bindings/pinctrl/fsl,imxrt1170.yaml |  77 -----
 drivers/pinctrl/freescale/Kconfig                  |  16 -
 drivers/pinctrl/freescale/Makefile                 |   2 -
 drivers/pinctrl/freescale/pinctrl-imxrt1050.c      | 309 ------------------
 drivers/pinctrl/freescale/pinctrl-imxrt1170.c      | 349 ---------------------
 6 files changed, 832 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml 
b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml
deleted file mode 100644
index db5fe66ad8733..0000000000000
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml
+++ /dev/null
@@ -1,79 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1050.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Freescale IMXRT1050 IOMUX Controller
-
-maintainers:
-  - Giulio Benetti <[email protected]>
-  - Jesse Taube <[email protected]>
-
-description:
-  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this 
directory
-  for common binding part and usage.
-
-properties:
-  compatible:
-    const: fsl,imxrt1050-iomuxc
-
-  reg:
-    maxItems: 1
-
-# Client device subnode's properties
-patternProperties:
-  'grp$':
-    type: object
-    description:
-      Pinctrl node's client devices use subnodes for desired pin configuration.
-      Client device subnodes use below standard properties.
-
-    properties:
-      fsl,pins:
-        description:
-          each entry consists of 6 integers and represents the mux and config
-          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
-          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
-          be found in <arch/arm/boot/dts/imxrt1050-pinfunc.h>. The last
-          integer CONFIG is the pad setting value like pull-up on this pin. 
Please
-          refer to i.MXRT1050 Reference Manual for detailed CONFIG settings.
-        $ref: /schemas/types.yaml#/definitions/uint32-matrix
-        items:
-          items:
-            - description: |
-                "mux_reg" indicates the offset of mux register.
-            - description: |
-                "conf_reg" indicates the offset of pad configuration register.
-            - description: |
-                "input_reg" indicates the offset of select input register.
-            - description: |
-                "mux_val" indicates the mux value to be applied.
-            - description: |
-                "input_val" indicates the select input value to be applied.
-            - description: |
-                "pad_setting" indicates the pad configuration value to be 
applied.
-
-    required:
-      - fsl,pins
-
-    additionalProperties: false
-
-required:
-  - compatible
-  - reg
-
-additionalProperties: false
-
-examples:
-  - |
-    iomuxc: iomuxc@401f8000 {
-        compatible = "fsl,imxrt1050-iomuxc";
-        reg = <0x401f8000 0x4000>;
-
-        pinctrl_lpuart1: lpuart1grp {
-            fsl,pins =
-              <0x0EC 0x2DC 0x000 0x2 0x0       0xf1>,
-              <0x0F0 0x2E0 0x000 0x2 0x0       0xf1>;
-        };
-    };
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml 
b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
deleted file mode 100644
index 2e880b3e537c1..0000000000000
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
+++ /dev/null
@@ -1,77 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Freescale i.MXRT1170 IOMUX Controller
-
-maintainers:
-  - Giulio Benetti <[email protected]>
-  - Jesse Taube <[email protected]>
-
-description:
-  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this 
directory
-  for common binding part and usage.
-
-properties:
-  compatible:
-    const: fsl,imxrt1170-iomuxc
-
-  reg:
-    maxItems: 1
-
-# Client device subnode's properties
-patternProperties:
-  'grp$':
-    type: object
-    description:
-      Pinctrl node's client devices use subnodes for desired pin configuration.
-      Client device subnodes use below standard properties.
-
-    properties:
-      fsl,pins:
-        description:
-          each entry consists of 6 integers and represents the mux and config
-          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
-          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
-          be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
-          integer CONFIG is the pad setting value like pull-up on this pin. 
Please
-          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
-        $ref: /schemas/types.yaml#/definitions/uint32-matrix
-        items:
-          items:
-            - description: |
-                "mux_reg" indicates the offset of mux register.
-            - description: |
-                "conf_reg" indicates the offset of pad configuration register.
-            - description: |
-                "input_reg" indicates the offset of select input register.
-            - description: |
-                "mux_val" indicates the mux value to be applied.
-            - description: |
-                "input_val" indicates the select input value to be applied.
-            - description: |
-                "pad_setting" indicates the pad configuration value to be 
applied.
-    required:
-      - fsl,pins
-
-    additionalProperties: false
-
-required:
-  - compatible
-  - reg
-
-additionalProperties: false
-
-examples:
-  - |
-    iomuxc: iomuxc@400e8000 {
-        compatible = "fsl,imxrt1170-iomuxc";
-        reg = <0x400e8000 0x4000>;
-        pinctrl_lpuart1: lpuart1grp {
-            fsl,pins =
-              <0x16C 0x3B0 0x620 0x0 0x0  0xf1>,
-              <0x170 0x3B4 0x61C 0x0 0x0       0xf1>;
-        };
-    };
diff --git a/drivers/pinctrl/freescale/Kconfig 
b/drivers/pinctrl/freescale/Kconfig
index fd53cf5bb843d..9baf222abdecf 100644
--- a/drivers/pinctrl/freescale/Kconfig
+++ b/drivers/pinctrl/freescale/Kconfig
@@ -229,15 +229,6 @@ config PINCTRL_IMX8ULP
        help
          Say Y here to enable the imx8ulp pinctrl driver
 
-config PINCTRL_IMXRT1050
-       bool "IMXRT1050 pinctrl driver"
-       depends on OF
-       depends on SOC_IMXRT || COMPILE_TEST
-       default SOC_IMXRT
-       select PINCTRL_IMX
-       help
-         Say Y here to enable the imxrt1050 pinctrl driver
-
 config PINCTRL_IMX91
        tristate "IMX91 pinctrl driver"
        depends on ARCH_MXC
@@ -276,10 +267,3 @@ config PINCTRL_IMX28
        bool
        select PINCTRL_MXS
 
-config PINCTRL_IMXRT1170
-       bool "IMXRT1170 pinctrl driver"
-       depends on OF
-       depends on SOC_IMXRT || COMPILE_TEST
-       select PINCTRL_IMX
-       help
-         Say Y here to enable the imxrt1170 pinctrl driver
diff --git a/drivers/pinctrl/freescale/Makefile 
b/drivers/pinctrl/freescale/Makefile
index d27085c2b4c45..72de53db68eb8 100644
--- a/drivers/pinctrl/freescale/Makefile
+++ b/drivers/pinctrl/freescale/Makefile
@@ -33,5 +33,3 @@ obj-$(CONFIG_PINCTRL_MXS)     += pinctrl-mxs.o
 obj-$(CONFIG_PINCTRL_IMX23)    += pinctrl-imx23.o
 obj-$(CONFIG_PINCTRL_IMX25)    += pinctrl-imx25.o
 obj-$(CONFIG_PINCTRL_IMX28)    += pinctrl-imx28.o
-obj-$(CONFIG_PINCTRL_IMXRT1050)        += pinctrl-imxrt1050.o
-obj-$(CONFIG_PINCTRL_IMXRT1170)        += pinctrl-imxrt1170.o
diff --git a/drivers/pinctrl/freescale/pinctrl-imxrt1050.c 
b/drivers/pinctrl/freescale/pinctrl-imxrt1050.c
deleted file mode 100644
index f6435227d4fbb..0000000000000
--- a/drivers/pinctrl/freescale/pinctrl-imxrt1050.c
+++ /dev/null
@@ -1,309 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2020
- * Author(s): Giulio Benetti <[email protected]>
- */
-
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/platform_device.h>
-
-#include "pinctrl-imx.h"
-
-enum imxrt1050_pads {
-       IMXRT1050_PAD_RESERVE0,
-       IMXRT1050_PAD_RESERVE1,
-       IMXRT1050_PAD_RESERVE2,
-       IMXRT1050_PAD_RESERVE3,
-       IMXRT1050_PAD_RESERVE4,
-       IMXRT1050_PAD_EMC_00,
-       IMXRT1050_PAD_EMC_01,
-       IMXRT1050_PAD_EMC_02,
-       IMXRT1050_PAD_EMC_03,
-       IMXRT1050_PAD_EMC_04,
-       IMXRT1050_PAD_EMC_05,
-       IMXRT1050_PAD_EMC_06,
-       IMXRT1050_PAD_EMC_07,
-       IMXRT1050_PAD_EMC_08,
-       IMXRT1050_PAD_EMC_09,
-       IMXRT1050_PAD_EMC_10,
-       IMXRT1050_PAD_EMC_11,
-       IMXRT1050_PAD_EMC_12,
-       IMXRT1050_PAD_EMC_13,
-       IMXRT1050_PAD_EMC_14,
-       IMXRT1050_PAD_EMC_15,
-       IMXRT1050_PAD_EMC_16,
-       IMXRT1050_PAD_EMC_17,
-       IMXRT1050_PAD_EMC_18,
-       IMXRT1050_PAD_EMC_19,
-       IMXRT1050_PAD_EMC_20,
-       IMXRT1050_PAD_EMC_21,
-       IMXRT1050_PAD_EMC_22,
-       IMXRT1050_PAD_EMC_23,
-       IMXRT1050_PAD_EMC_24,
-       IMXRT1050_PAD_EMC_25,
-       IMXRT1050_PAD_EMC_26,
-       IMXRT1050_PAD_EMC_27,
-       IMXRT1050_PAD_EMC_28,
-       IMXRT1050_PAD_EMC_29,
-       IMXRT1050_PAD_EMC_30,
-       IMXRT1050_PAD_EMC_31,
-       IMXRT1050_PAD_EMC_32,
-       IMXRT1050_PAD_EMC_33,
-       IMXRT1050_PAD_EMC_34,
-       IMXRT1050_PAD_EMC_35,
-       IMXRT1050_PAD_EMC_36,
-       IMXRT1050_PAD_EMC_37,
-       IMXRT1050_PAD_EMC_38,
-       IMXRT1050_PAD_EMC_39,
-       IMXRT1050_PAD_EMC_40,
-       IMXRT1050_PAD_EMC_41,
-       IMXRT1050_PAD_AD_B0_00,
-       IMXRT1050_PAD_AD_B0_01,
-       IMXRT1050_PAD_AD_B0_02,
-       IMXRT1050_PAD_AD_B0_03,
-       IMXRT1050_PAD_AD_B0_04,
-       IMXRT1050_PAD_AD_B0_05,
-       IMXRT1050_PAD_AD_B0_06,
-       IMXRT1050_PAD_AD_B0_07,
-       IMXRT1050_PAD_AD_B0_08,
-       IMXRT1050_PAD_AD_B0_09,
-       IMXRT1050_PAD_AD_B0_10,
-       IMXRT1050_PAD_AD_B0_11,
-       IMXRT1050_PAD_AD_B0_12,
-       IMXRT1050_PAD_AD_B0_13,
-       IMXRT1050_PAD_AD_B0_14,
-       IMXRT1050_PAD_AD_B0_15,
-       IMXRT1050_PAD_AD_B1_00,
-       IMXRT1050_PAD_AD_B1_01,
-       IMXRT1050_PAD_AD_B1_02,
-       IMXRT1050_PAD_AD_B1_03,
-       IMXRT1050_PAD_AD_B1_04,
-       IMXRT1050_PAD_AD_B1_05,
-       IMXRT1050_PAD_AD_B1_06,
-       IMXRT1050_PAD_AD_B1_07,
-       IMXRT1050_PAD_AD_B1_08,
-       IMXRT1050_PAD_AD_B1_09,
-       IMXRT1050_PAD_AD_B1_10,
-       IMXRT1050_PAD_AD_B1_11,
-       IMXRT1050_PAD_AD_B1_12,
-       IMXRT1050_PAD_AD_B1_13,
-       IMXRT1050_PAD_AD_B1_14,
-       IMXRT1050_PAD_AD_B1_15,
-       IMXRT1050_PAD_B0_00,
-       IMXRT1050_PAD_B0_01,
-       IMXRT1050_PAD_B0_02,
-       IMXRT1050_PAD_B0_03,
-       IMXRT1050_PAD_B0_04,
-       IMXRT1050_PAD_B0_05,
-       IMXRT1050_PAD_B0_06,
-       IMXRT1050_PAD_B0_07,
-       IMXRT1050_PAD_B0_08,
-       IMXRT1050_PAD_B0_09,
-       IMXRT1050_PAD_B0_10,
-       IMXRT1050_PAD_B0_11,
-       IMXRT1050_PAD_B0_12,
-       IMXRT1050_PAD_B0_13,
-       IMXRT1050_PAD_B0_14,
-       IMXRT1050_PAD_B0_15,
-       IMXRT1050_PAD_B1_00,
-       IMXRT1050_PAD_B1_01,
-       IMXRT1050_PAD_B1_02,
-       IMXRT1050_PAD_B1_03,
-       IMXRT1050_PAD_B1_04,
-       IMXRT1050_PAD_B1_05,
-       IMXRT1050_PAD_B1_06,
-       IMXRT1050_PAD_B1_07,
-       IMXRT1050_PAD_B1_08,
-       IMXRT1050_PAD_B1_09,
-       IMXRT1050_PAD_B1_10,
-       IMXRT1050_PAD_B1_11,
-       IMXRT1050_PAD_B1_12,
-       IMXRT1050_PAD_B1_13,
-       IMXRT1050_PAD_B1_14,
-       IMXRT1050_PAD_B1_15,
-       IMXRT1050_PAD_SD_B0_00,
-       IMXRT1050_PAD_SD_B0_01,
-       IMXRT1050_PAD_SD_B0_02,
-       IMXRT1050_PAD_SD_B0_03,
-       IMXRT1050_PAD_SD_B0_04,
-       IMXRT1050_PAD_SD_B0_05,
-       IMXRT1050_PAD_SD_B1_00,
-       IMXRT1050_PAD_SD_B1_01,
-       IMXRT1050_PAD_SD_B1_02,
-       IMXRT1050_PAD_SD_B1_03,
-       IMXRT1050_PAD_SD_B1_04,
-       IMXRT1050_PAD_SD_B1_05,
-       IMXRT1050_PAD_SD_B1_06,
-       IMXRT1050_PAD_SD_B1_07,
-       IMXRT1050_PAD_SD_B1_08,
-       IMXRT1050_PAD_SD_B1_09,
-       IMXRT1050_PAD_SD_B1_10,
-       IMXRT1050_PAD_SD_B1_11,
-};
-
-/* Pad names for the pinmux subsystem */
-static const struct pinctrl_pin_desc imxrt1050_pinctrl_pads[] = {
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE0),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE1),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE2),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE3),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_RESERVE4),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_11),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_12),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_13),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_14),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_15),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_16),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_17),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_18),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_19),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_20),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_21),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_22),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_23),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_24),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_25),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_26),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_27),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_28),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_29),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_30),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_31),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_32),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_33),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_34),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_35),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_36),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_37),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_38),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_39),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_40),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_EMC_41),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_11),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_12),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_13),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_14),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B0_15),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_11),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_12),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_13),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_14),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_AD_B1_15),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_11),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_12),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_13),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_14),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B0_15),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_11),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_12),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_13),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_14),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_B1_15),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B0_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_06),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_07),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_08),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_09),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_10),
-       IMX_PINCTRL_PIN(IMXRT1050_PAD_SD_B1_11),
-};
-
-static const struct imx_pinctrl_soc_info imxrt1050_pinctrl_info = {
-       .pins = imxrt1050_pinctrl_pads,
-       .npins = ARRAY_SIZE(imxrt1050_pinctrl_pads),
-       .gpr_compatible = "fsl,imxrt1050-iomuxc-gpr",
-};
-
-static const struct of_device_id imxrt1050_pinctrl_of_match[] = {
-       { .compatible = "fsl,imxrt1050-iomuxc", .data = 
&imxrt1050_pinctrl_info, },
-       { /* sentinel */ }
-};
-
-static int imxrt1050_pinctrl_probe(struct platform_device *pdev)
-{
-       return imx_pinctrl_probe(pdev, &imxrt1050_pinctrl_info);
-}
-
-static struct platform_driver imxrt1050_pinctrl_driver = {
-       .driver = {
-               .name = "imxrt1050-pinctrl",
-               .of_match_table = of_match_ptr(imxrt1050_pinctrl_of_match),
-               .suppress_bind_attrs = true,
-       },
-       .probe = imxrt1050_pinctrl_probe,
-};
-
-static int __init imxrt1050_pinctrl_init(void)
-{
-       return platform_driver_register(&imxrt1050_pinctrl_driver);
-}
-arch_initcall(imxrt1050_pinctrl_init);
diff --git a/drivers/pinctrl/freescale/pinctrl-imxrt1170.c 
b/drivers/pinctrl/freescale/pinctrl-imxrt1170.c
deleted file mode 100644
index d8857f329e253..0000000000000
--- a/drivers/pinctrl/freescale/pinctrl-imxrt1170.c
+++ /dev/null
@@ -1,349 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2022
- * Author(s): Jesse Taube <[email protected]>
- */
-
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/platform_device.h>
-
-#include "pinctrl-imx.h"
-
-enum imxrt1170_pads {
-       IMXRT1170_PAD_RESERVE0,
-       IMXRT1170_PAD_RESERVE1,
-       IMXRT1170_PAD_RESERVE2,
-       IMXRT1170_PAD_RESERVE3,
-       IMXRT1170_PAD_EMC_B1_00,
-       IMXRT1170_PAD_EMC_B1_01,
-       IMXRT1170_PAD_EMC_B1_02,
-       IMXRT1170_PAD_EMC_B1_03,
-       IMXRT1170_PAD_EMC_B1_04,
-       IMXRT1170_PAD_EMC_B1_05,
-       IMXRT1170_PAD_EMC_B1_06,
-       IMXRT1170_PAD_EMC_B1_07,
-       IMXRT1170_PAD_EMC_B1_08,
-       IMXRT1170_PAD_EMC_B1_09,
-       IMXRT1170_PAD_EMC_B1_10,
-       IMXRT1170_PAD_EMC_B1_11,
-       IMXRT1170_PAD_EMC_B1_12,
-       IMXRT1170_PAD_EMC_B1_13,
-       IMXRT1170_PAD_EMC_B1_14,
-       IMXRT1170_PAD_EMC_B1_15,
-       IMXRT1170_PAD_EMC_B1_16,
-       IMXRT1170_PAD_EMC_B1_17,
-       IMXRT1170_PAD_EMC_B1_18,
-       IMXRT1170_PAD_EMC_B1_19,
-       IMXRT1170_PAD_EMC_B1_20,
-       IMXRT1170_PAD_EMC_B1_21,
-       IMXRT1170_PAD_EMC_B1_22,
-       IMXRT1170_PAD_EMC_B1_23,
-       IMXRT1170_PAD_EMC_B1_24,
-       IMXRT1170_PAD_EMC_B1_25,
-       IMXRT1170_PAD_EMC_B1_26,
-       IMXRT1170_PAD_EMC_B1_27,
-       IMXRT1170_PAD_EMC_B1_28,
-       IMXRT1170_PAD_EMC_B1_29,
-       IMXRT1170_PAD_EMC_B1_30,
-       IMXRT1170_PAD_EMC_B1_31,
-       IMXRT1170_PAD_EMC_B1_32,
-       IMXRT1170_PAD_EMC_B1_33,
-       IMXRT1170_PAD_EMC_B1_34,
-       IMXRT1170_PAD_EMC_B1_35,
-       IMXRT1170_PAD_EMC_B1_36,
-       IMXRT1170_PAD_EMC_B1_37,
-       IMXRT1170_PAD_EMC_B1_38,
-       IMXRT1170_PAD_EMC_B1_39,
-       IMXRT1170_PAD_EMC_B1_40,
-       IMXRT1170_PAD_EMC_B1_41,
-       IMXRT1170_PAD_EMC_B2_00,
-       IMXRT1170_PAD_EMC_B2_01,
-       IMXRT1170_PAD_EMC_B2_02,
-       IMXRT1170_PAD_EMC_B2_03,
-       IMXRT1170_PAD_EMC_B2_04,
-       IMXRT1170_PAD_EMC_B2_05,
-       IMXRT1170_PAD_EMC_B2_06,
-       IMXRT1170_PAD_EMC_B2_07,
-       IMXRT1170_PAD_EMC_B2_08,
-       IMXRT1170_PAD_EMC_B2_09,
-       IMXRT1170_PAD_EMC_B2_10,
-       IMXRT1170_PAD_EMC_B2_11,
-       IMXRT1170_PAD_EMC_B2_12,
-       IMXRT1170_PAD_EMC_B2_13,
-       IMXRT1170_PAD_EMC_B2_14,
-       IMXRT1170_PAD_EMC_B2_15,
-       IMXRT1170_PAD_EMC_B2_16,
-       IMXRT1170_PAD_EMC_B2_17,
-       IMXRT1170_PAD_EMC_B2_18,
-       IMXRT1170_PAD_EMC_B2_19,
-       IMXRT1170_PAD_EMC_B2_20,
-       IMXRT1170_PAD_AD_00,
-       IMXRT1170_PAD_AD_01,
-       IMXRT1170_PAD_AD_02,
-       IMXRT1170_PAD_AD_03,
-       IMXRT1170_PAD_AD_04,
-       IMXRT1170_PAD_AD_05,
-       IMXRT1170_PAD_AD_06,
-       IMXRT1170_PAD_AD_07,
-       IMXRT1170_PAD_AD_08,
-       IMXRT1170_PAD_AD_09,
-       IMXRT1170_PAD_AD_10,
-       IMXRT1170_PAD_AD_11,
-       IMXRT1170_PAD_AD_12,
-       IMXRT1170_PAD_AD_13,
-       IMXRT1170_PAD_AD_14,
-       IMXRT1170_PAD_AD_15,
-       IMXRT1170_PAD_AD_16,
-       IMXRT1170_PAD_AD_17,
-       IMXRT1170_PAD_AD_18,
-       IMXRT1170_PAD_AD_19,
-       IMXRT1170_PAD_AD_20,
-       IMXRT1170_PAD_AD_21,
-       IMXRT1170_PAD_AD_22,
-       IMXRT1170_PAD_AD_23,
-       IMXRT1170_PAD_AD_24,
-       IMXRT1170_PAD_AD_25,
-       IMXRT1170_PAD_AD_26,
-       IMXRT1170_PAD_AD_27,
-       IMXRT1170_PAD_AD_28,
-       IMXRT1170_PAD_AD_29,
-       IMXRT1170_PAD_AD_30,
-       IMXRT1170_PAD_AD_31,
-       IMXRT1170_PAD_AD_32,
-       IMXRT1170_PAD_AD_33,
-       IMXRT1170_PAD_AD_34,
-       IMXRT1170_PAD_AD_35,
-       IMXRT1170_PAD_SD_B1_00,
-       IMXRT1170_PAD_SD_B1_01,
-       IMXRT1170_PAD_SD_B1_02,
-       IMXRT1170_PAD_SD_B1_03,
-       IMXRT1170_PAD_SD_B1_04,
-       IMXRT1170_PAD_SD_B1_05,
-       IMXRT1170_PAD_SD_B2_00,
-       IMXRT1170_PAD_SD_B2_01,
-       IMXRT1170_PAD_SD_B2_02,
-       IMXRT1170_PAD_SD_B2_03,
-       IMXRT1170_PAD_SD_B2_04,
-       IMXRT1170_PAD_SD_B2_05,
-       IMXRT1170_PAD_SD_B2_06,
-       IMXRT1170_PAD_SD_B2_07,
-       IMXRT1170_PAD_SD_B2_08,
-       IMXRT1170_PAD_SD_B2_09,
-       IMXRT1170_PAD_SD_B2_10,
-       IMXRT1170_PAD_SD_B2_11,
-       IMXRT1170_PAD_DISP_B1_00,
-       IMXRT1170_PAD_DISP_B1_01,
-       IMXRT1170_PAD_DISP_B1_02,
-       IMXRT1170_PAD_DISP_B1_03,
-       IMXRT1170_PAD_DISP_B1_04,
-       IMXRT1170_PAD_DISP_B1_05,
-       IMXRT1170_PAD_DISP_B1_06,
-       IMXRT1170_PAD_DISP_B1_07,
-       IMXRT1170_PAD_DISP_B1_08,
-       IMXRT1170_PAD_DISP_B1_09,
-       IMXRT1170_PAD_DISP_B1_10,
-       IMXRT1170_PAD_DISP_B1_11,
-       IMXRT1170_PAD_DISP_B2_00,
-       IMXRT1170_PAD_DISP_B2_01,
-       IMXRT1170_PAD_DISP_B2_02,
-       IMXRT1170_PAD_DISP_B2_03,
-       IMXRT1170_PAD_DISP_B2_04,
-       IMXRT1170_PAD_DISP_B2_05,
-       IMXRT1170_PAD_DISP_B2_06,
-       IMXRT1170_PAD_DISP_B2_07,
-       IMXRT1170_PAD_DISP_B2_08,
-       IMXRT1170_PAD_DISP_B2_09,
-       IMXRT1170_PAD_DISP_B2_10,
-       IMXRT1170_PAD_DISP_B2_11,
-       IMXRT1170_PAD_DISP_B2_12,
-       IMXRT1170_PAD_DISP_B2_13,
-       IMXRT1170_PAD_DISP_B2_14,
-       IMXRT1170_PAD_DISP_B2_15,
-};
-
-/* Pad names for the pinmux subsystem */
-static const struct pinctrl_pin_desc imxrt1170_pinctrl_pads[] = {
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE0),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE1),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE2),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_RESERVE3),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_12),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_13),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_14),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_15),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_16),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_17),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_18),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_19),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_20),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_21),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_22),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_23),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_24),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_25),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_26),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_27),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_28),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_29),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_30),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_31),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_32),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_33),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_34),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_35),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_36),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_37),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_38),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_39),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_40),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B1_41),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_12),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_13),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_14),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_15),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_16),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_17),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_18),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_19),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_EMC_B2_20),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_12),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_13),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_14),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_15),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_16),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_17),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_18),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_19),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_20),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_21),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_22),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_23),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_24),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_25),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_26),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_27),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_28),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_29),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_30),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_31),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_32),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_33),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_34),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_AD_35),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_SD_B2_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B1_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_00),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_01),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_02),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_03),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_04),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_05),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_06),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_07),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_08),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_09),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_10),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_11),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_12),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_13),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_14),
-       IMX_PINCTRL_PIN(IMXRT1170_PAD_DISP_B2_15),
-};
-
-static const struct imx_pinctrl_soc_info imxrt1170_pinctrl_info = {
-       .pins = imxrt1170_pinctrl_pads,
-       .npins = ARRAY_SIZE(imxrt1170_pinctrl_pads),
-       .gpr_compatible = "fsl,imxrt1170-iomuxc-gpr",
-};
-
-static const struct of_device_id imxrt1170_pinctrl_of_match[] = {
-       { .compatible = "fsl,imxrt1170-iomuxc", .data = 
&imxrt1170_pinctrl_info, },
-       { /* sentinel */ }
-};
-
-static int imxrt1170_pinctrl_probe(struct platform_device *pdev)
-{
-       return imx_pinctrl_probe(pdev, &imxrt1170_pinctrl_info);
-}
-
-static struct platform_driver imxrt1170_pinctrl_driver = {
-       .driver = {
-               .name = "imxrt1170-pinctrl",
-               .of_match_table = of_match_ptr(imxrt1170_pinctrl_of_match),
-               .suppress_bind_attrs = true,
-       },
-       .probe = imxrt1170_pinctrl_probe,
-};
-
-static int __init imxrt1170_pinctrl_init(void)
-{
-       return platform_driver_register(&imxrt1170_pinctrl_driver);
-}
-arch_initcall(imxrt1170_pinctrl_init);

-- 
2.43.0



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