From: Ira Weiny <[email protected]>

Per the CXL 4.0 specification software must check the Command Effects
Log (CEL) for dynamic capacity command support.

Detect support for the DCD commands while reading the CEL, including:

        Get DC Config
        Get DC Extent List
        Add DC Response
        Release DC

Based on an original patch by Navneet Singh.

Signed-off-by: Ira Weiny <[email protected]>
Signed-off-by: Anisa Su <[email protected]>

---

Changes:
- remove unused param struct cxl_memdev_state *mds from
  cxl_set_dcd_cmd_enabled()

- remove unused param struct cxl_memdev_state *mds from
  cxl_verify_dcd_cmds()

- cxl_verify_dcd_cmds(): originally filled out local
  bitmap with all DCD cmd bits and checking if cmds_seen
  bitmap is equal to the local bitmap. Replace with
  simple call to bitmap_full(cmd_seen)

- cxl_walk_cel(): zero out dcd_cmds bitmap before using

- cxlmem.h: Add comment to enum dcd_cmd_enabled_bits
  pointing to where the command set is defined in the
  4.0 spec

- original commit message referred to CXL r3.1. Bump to r4.0
---
 drivers/cxl/core/mbox.c | 39 +++++++++++++++++++++++++++++++++++++++
 drivers/cxl/cxlmem.h    | 20 ++++++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
index 7c6c5b7450a5..07aba6f0b719 100644
--- a/drivers/cxl/core/mbox.c
+++ b/drivers/cxl/core/mbox.c
@@ -165,6 +165,38 @@ static void cxl_set_security_cmd_enabled(struct 
cxl_security_state *security,
        }
 }
 
+static bool cxl_is_dcd_command(u16 opcode)
+{
+#define CXL_MBOX_OP_DCD_CMDS 0x48
+
+       return (opcode >> 8) == CXL_MBOX_OP_DCD_CMDS;
+}
+
+static void cxl_set_dcd_cmd_enabled(u16 opcode, unsigned long *cmd_mask)
+{
+       switch (opcode) {
+       case CXL_MBOX_OP_GET_DC_CONFIG:
+               set_bit(CXL_DCD_ENABLED_GET_CONFIG, cmd_mask);
+               break;
+       case CXL_MBOX_OP_GET_DC_EXTENT_LIST:
+               set_bit(CXL_DCD_ENABLED_GET_EXTENT_LIST, cmd_mask);
+               break;
+       case CXL_MBOX_OP_ADD_DC_RESPONSE:
+               set_bit(CXL_DCD_ENABLED_ADD_RESPONSE, cmd_mask);
+               break;
+       case CXL_MBOX_OP_RELEASE_DC:
+               set_bit(CXL_DCD_ENABLED_RELEASE, cmd_mask);
+               break;
+       default:
+               break;
+       }
+}
+
+static bool cxl_verify_dcd_cmds(unsigned long *cmds_seen)
+{
+       return bitmap_full(cmds_seen, CXL_DCD_ENABLED_MAX);
+}
+
 static bool cxl_is_poison_command(u16 opcode)
 {
 #define CXL_MBOX_OP_POISON_CMDS 0x43
@@ -757,6 +789,7 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, 
size_t size, u8 *cel)
        struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox;
        struct cxl_cel_entry *cel_entry;
        const int cel_entries = size / sizeof(*cel_entry);
+       DECLARE_BITMAP(dcd_cmds, CXL_DCD_ENABLED_MAX) = {};
        struct device *dev = mds->cxlds.dev;
        int i, ro_cmds = 0, wr_cmds = 0;
 
@@ -785,11 +818,17 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, 
size_t size, u8 *cel)
                        enabled++;
                }
 
+               if (cxl_is_dcd_command(opcode)) {
+                       cxl_set_dcd_cmd_enabled(opcode, dcd_cmds);
+                       enabled++;
+               }
+
                dev_dbg(dev, "Opcode 0x%04x %s\n", opcode,
                        enabled ? "enabled" : "unsupported by driver");
        }
 
        set_features_cap(cxl_mbox, ro_cmds, wr_cmds);
+       mds->dcd_supported = cxl_verify_dcd_cmds(dcd_cmds);
 }
 
 static struct cxl_mbox_get_supported_logs *cxl_get_gsl(struct cxl_memdev_state 
*mds)
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index 776c50d1db51..60dc3f0006a7 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -230,6 +230,20 @@ struct cxl_event_state {
        struct mutex log_lock;
 };
 
+/**
+ * CXL r4.0 Section 8.2.10.9 - Memory Device Command Sets. See Table 8-308.
+ *
+ * The 48h Command Set (Opcodes 4800h - 4803h) defines the device-enabled DCD
+ * commands.
+ * */
+enum dcd_cmd_enabled_bits {
+       CXL_DCD_ENABLED_GET_CONFIG,
+       CXL_DCD_ENABLED_GET_EXTENT_LIST,
+       CXL_DCD_ENABLED_ADD_RESPONSE,
+       CXL_DCD_ENABLED_RELEASE,
+       CXL_DCD_ENABLED_MAX
+};
+
 /* Device enabled poison commands */
 enum poison_cmd_enabled_bits {
        CXL_POISON_ENABLED_LIST,
@@ -405,6 +419,7 @@ static inline struct cxl_dev_state *mbox_to_cxlds(struct 
cxl_mailbox *cxl_mbox)
  * @partition_align_bytes: alignment size for partition-able capacity
  * @active_volatile_bytes: sum of hard + soft volatile
  * @active_persistent_bytes: sum of hard + soft persistent
+ * @dcd_supported: all DCD commands are supported
  * @event: event log driver state
  * @poison: poison driver state info
  * @security: security driver state info
@@ -424,6 +439,7 @@ struct cxl_memdev_state {
        u64 partition_align_bytes;
        u64 active_volatile_bytes;
        u64 active_persistent_bytes;
+       bool dcd_supported;
 
        struct cxl_event_state event;
        struct cxl_poison_state poison;
@@ -485,6 +501,10 @@ enum cxl_opcode {
        CXL_MBOX_OP_UNLOCK              = 0x4503,
        CXL_MBOX_OP_FREEZE_SECURITY     = 0x4504,
        CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE     = 0x4505,
+       CXL_MBOX_OP_GET_DC_CONFIG       = 0x4800,
+       CXL_MBOX_OP_GET_DC_EXTENT_LIST  = 0x4801,
+       CXL_MBOX_OP_ADD_DC_RESPONSE     = 0x4802,
+       CXL_MBOX_OP_RELEASE_DC          = 0x4803,
        CXL_MBOX_OP_MAX                 = 0x10000
 };
 
-- 
2.43.0


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