In order to prepare paravirt inlining of the MSR access instructions
move the calls of MSR trace functions one function level up.

Introduce {read|write}_msr[_safe]() helpers allowing to have common
definitions in msr.h doing the trace calls.

Signed-off-by: Juergen Gross <[email protected]>
Reviewed-by: H. Peter Anvin (Intel) <[email protected]>
---
V4:
- some modifications removed due to rebase
---
 arch/x86/include/asm/msr.h      | 79 ++++++++++++++++++++++-----------
 arch/x86/include/asm/paravirt.h |  8 ++--
 2 files changed, 57 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 3b33d432bc24..266298b3d201 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -95,14 +95,7 @@ static __always_inline void native_wrmsrq(u32 msr, u64 val)
 
 static inline u64 native_read_msr(u32 msr)
 {
-       u64 val;
-
-       val = __rdmsr(msr);
-
-       if (tracepoint_enabled(read_msr))
-               do_trace_read_msr(msr, val, 0);
-
-       return val;
+       return __rdmsr(msr);
 }
 
 static inline int native_read_msr_safe(u32 msr, u64 *p)
@@ -115,8 +108,6 @@ static inline int native_read_msr_safe(u32 msr, u64 *p)
                     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
                     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
                     : "c" (msr));
-       if (tracepoint_enabled(read_msr))
-               do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);
 
        *p = EAX_EDX_VAL(val, low, high);
 
@@ -127,9 +118,6 @@ static inline int native_read_msr_safe(u32 msr, u64 *p)
 static inline void notrace native_write_msr(u32 msr, u64 val)
 {
        native_wrmsrq(msr, val);
-
-       if (tracepoint_enabled(write_msr))
-               do_trace_write_msr(msr, val, 0);
 }
 
 /* Can be uninlined because referenced by paravirt */
@@ -143,8 +131,6 @@ static inline int notrace native_write_msr_safe(u32 msr, 
u64 val)
                     : [err] "=a" (err)
                     : "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))
                     : "memory");
-       if (tracepoint_enabled(write_msr))
-               do_trace_write_msr(msr, val, err);
        return err;
 }
 
@@ -165,36 +151,77 @@ static inline u64 native_read_pmc(int counter)
 #include <asm/paravirt.h>
 #else
 #include <linux/errno.h>
-
-/* Access to machine-specific registers (available on 586 and better only) */
-
-static __always_inline u64 rdmsrq(u32 msr)
+static __always_inline u64 read_msr(u32 msr)
 {
        return native_read_msr(msr);
 }
 
-static inline void wrmsrq(u32 msr, u64 val)
+static __always_inline int read_msr_safe(u32 msr, u64 *p)
+{
+       return native_read_msr_safe(msr, p);
+}
+
+static __always_inline void write_msr(u32 msr, u64 val)
 {
        native_write_msr(msr, val);
 }
 
-/* wrmsr with exception handling */
-static inline int wrmsrq_safe(u32 msr, u64 val)
+static __always_inline int write_msr_safe(u32 msr, u64 val)
 {
        return native_write_msr_safe(msr, val);
 }
 
+static __always_inline u64 rdpmc(int counter)
+{
+       return native_read_pmc(counter);
+}
+#endif /* !CONFIG_PARAVIRT_XXL */
+
+/* Access to machine-specific registers (available on 586 and better only) */
+
+static __always_inline u64 rdmsrq(u32 msr)
+{
+       u64 val = read_msr(msr);
+
+       if (tracepoint_enabled(read_msr))
+               do_trace_read_msr(msr, val, 0);
+
+       return val;
+}
+
+/* rdmsr with exception handling */
 static inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-       return native_read_msr_safe(msr, p);
+       int err;
+
+       err = read_msr_safe(msr, p);
+
+       if (tracepoint_enabled(read_msr))
+               do_trace_read_msr(msr, *p, err);
+
+       return err;
 }
 
-static __always_inline u64 rdpmc(int counter)
+static inline void wrmsrq(u32 msr, u64 val)
 {
-       return native_read_pmc(counter);
+       write_msr(msr, val);
+
+       if (tracepoint_enabled(write_msr))
+               do_trace_write_msr(msr, val, 0);
 }
 
-#endif /* !CONFIG_PARAVIRT_XXL */
+/* wrmsr with exception handling */
+static inline int wrmsrq_safe(u32 msr, u64 val)
+{
+       int err;
+
+       err = write_msr_safe(msr, val);
+
+       if (tracepoint_enabled(write_msr))
+               do_trace_write_msr(msr, val, err);
+
+       return err;
+}
 
 /* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
 #define ASM_WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6)
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 19442bc3af37..a5a1fc4c88d1 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -150,22 +150,22 @@ static inline int paravirt_write_msr_safe(u32 msr, u64 
val)
        return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val);
 }
 
-static __always_inline u64 rdmsrq(u32 msr)
+static __always_inline u64 read_msr(u32 msr)
 {
        return paravirt_read_msr(msr);
 }
 
-static inline void wrmsrq(u32 msr, u64 val)
+static inline void write_msr(u32 msr, u64 val)
 {
        paravirt_write_msr(msr, val);
 }
 
-static inline int wrmsrq_safe(u32 msr, u64 val)
+static inline int write_msr_safe(u32 msr, u64 val)
 {
        return paravirt_write_msr_safe(msr, val);
 }
 
-static __always_inline int rdmsrq_safe(u32 msr, u64 *p)
+static __always_inline int read_msr_safe(u32 msr, u64 *p)
 {
        return paravirt_read_msr_safe(msr, p);
 }
-- 
2.54.0


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