On Tue, Jul 07, 2026 at 04:51:23PM -0500, Cheatham, Benjamin wrote:
> On 6/25/2026 6:04 AM, Anisa Su wrote:
> > From: Ira Weiny <[email protected]>
> >
> > Dynamic Capacity Devices (DCD) support extent change notifications
> > through the event log mechanism. The interrupt mailbox commands were
> > extended in CXL 3.1 to support these notifications. Firmware can't
> > configure DCD events to be FW controlled but can retain control of
> > memory events.
> >
> > Configure DCD event log interrupts on devices supporting dynamic
> > capacity. Disable DCD if interrupts are not supported.
> >
> > Care is taken to preserve the interrupt policy set by the FW if FW first
> > has been selected by the BIOS.
> >
> > Accept the 4-byte CXL 2.0 reply on GET Event Interrupt Policy by setting
> > min_out to CXL_EVENT_INT_POLICY_BASE_SIZE; pre-CXL 3.1 firmware omits
> > dcd_settings and would otherwise fail the size check.
> >
> > Based on an original patch by Navneet Singh.
> >
> > Signed-off-by: Ira Weiny <[email protected]>
> > Signed-off-by: Anisa Su <[email protected]>
> >
> > ---
> > Changes:
> > [anisa: add CXLDEV_EVENT_STATUS_DCD (bit 4) to CXLDEV_EVENT_STATUS_ALL;
> > previously added in a later commit but moved to current commit]
> >
> > [anisa: check native_cxl before cxl_mem_get_event_records]
> > ---
> > drivers/cxl/cxl.h | 4 +-
> > drivers/cxl/cxlmem.h | 2 +
> > drivers/cxl/pci.c | 94 ++++++++++++++++++++++++++++++++++++--------
> > 3 files changed, 83 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > index 1297594beaec..864f6d3c03d4 100644
> > --- a/drivers/cxl/cxl.h
> > +++ b/drivers/cxl/cxl.h
> > @@ -180,11 +180,13 @@ static inline int ways_to_eiw(unsigned int ways, u8
> > *eiw)
> > #define CXLDEV_EVENT_STATUS_WARN BIT(1)
> > #define CXLDEV_EVENT_STATUS_FAIL BIT(2)
> > #define CXLDEV_EVENT_STATUS_FATAL BIT(3)
> > +#define CXLDEV_EVENT_STATUS_DCD BIT(4)
> >
> > #define CXLDEV_EVENT_STATUS_ALL (CXLDEV_EVENT_STATUS_INFO | \
> > CXLDEV_EVENT_STATUS_WARN | \
> > CXLDEV_EVENT_STATUS_FAIL | \
> > - CXLDEV_EVENT_STATUS_FATAL)
> > + CXLDEV_EVENT_STATUS_FATAL | \
> > + CXLDEV_EVENT_STATUS_DCD)
> >
> > /* CXL rev 3.0 section 8.2.9.2.4; Table 8-52 */
> > #define CXLDEV_EVENT_INT_MODE_MASK GENMASK(1, 0)
> > diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> > index afc195d8c090..bcf976829c3e 100644
> > --- a/drivers/cxl/cxlmem.h
> > +++ b/drivers/cxl/cxlmem.h
> > @@ -218,7 +218,9 @@ struct cxl_event_interrupt_policy {
> > u8 warn_settings;
> > u8 failure_settings;
> > u8 fatal_settings;
> > + u8 dcd_settings;
> > } __packed;
> > +#define CXL_EVENT_INT_POLICY_BASE_SIZE 4 /* info, warn, failure, fatal */
> >
> > /**
> > * struct cxl_event_state - Event log driver state
> > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> > index 8d12c684d670..95a4bf7c1e46 100644
> > --- a/drivers/cxl/pci.c
> > +++ b/drivers/cxl/pci.c
> > @@ -514,7 +514,19 @@ static irqreturn_t cxl_event_thread(int irq, void *id)
> > struct cxl_dev_id *dev_id = id;
> > struct cxl_dev_state *cxlds = dev_id->cxlds;
> > struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlds);
> > + struct pci_host_bridge *host_bridge =
> > + pci_find_host_bridge(to_pci_dev(cxlds->dev)->bus);
> > u32 status;
> > + u32 mask;
> > +
> > + /*
> > + * Only drain logs the driver owns. When BIOS owns event reporting
> > + * (!native_cxl) the driver is only here for the Dynamic Capacity log;
> > + * processing the standard logs would steal firmware-first events from
> > + * BIOS, so mask them out.
> > + */
> > + mask = host_bridge->native_cxl_error ? CXLDEV_EVENT_STATUS_ALL
> > + : CXLDEV_EVENT_STATUS_DCD;
> >
> > do {
> > /*
> > @@ -522,8 +534,8 @@ static irqreturn_t cxl_event_thread(int irq, void *id)
> > * ignore the reserved upper 32 bits
> > */
> > status = readl(cxlds->regs.status +
> > CXLDEV_DEV_EVENT_STATUS_OFFSET);
> > - /* Ignore logs unknown to the driver */
> > - status &= CXLDEV_EVENT_STATUS_ALL;
> > + /* Ignore logs unknown to the driver or owned by BIOS */
> > + status &= mask;
> > if (!status)
> > break;
> > cxl_mem_get_event_records(mds, status);
> > @@ -557,6 +569,8 @@ static int cxl_event_get_int_policy(struct
> > cxl_memdev_state *mds,
> > .opcode = CXL_MBOX_OP_GET_EVT_INT_POLICY,
> > .payload_out = policy,
> > .size_out = sizeof(*policy),
> > + /* CXL 2.0 firmware omits dcd_settings; accept the shorter
> > reply */
> > + .min_out = CXL_EVENT_INT_POLICY_BASE_SIZE,
> > };
> > int rc;
> >
> > @@ -569,23 +583,34 @@ static int cxl_event_get_int_policy(struct
> > cxl_memdev_state *mds,
> > }
> >
> > static int cxl_event_config_msgnums(struct cxl_memdev_state *mds,
> > - struct cxl_event_interrupt_policy *policy)
> > + struct cxl_event_interrupt_policy *policy,
> > + bool native_cxl)
> > {
> > struct cxl_mailbox *cxl_mbox = &mds->cxlds.cxl_mbox;
> > + size_t size_in = CXL_EVENT_INT_POLICY_BASE_SIZE;
> > struct cxl_mbox_cmd mbox_cmd;
> > int rc;
> >
> > - *policy = (struct cxl_event_interrupt_policy) {
> > - .info_settings = CXL_INT_MSI_MSIX,
> > - .warn_settings = CXL_INT_MSI_MSIX,
> > - .failure_settings = CXL_INT_MSI_MSIX,
> > - .fatal_settings = CXL_INT_MSI_MSIX,
> > - };
> > + /* memory event policy is left if FW has control */
> > + if (native_cxl) {
> > + *policy = (struct cxl_event_interrupt_policy) {
> > + .info_settings = CXL_INT_MSI_MSIX,
> > + .warn_settings = CXL_INT_MSI_MSIX,
> > + .failure_settings = CXL_INT_MSI_MSIX,
> > + .fatal_settings = CXL_INT_MSI_MSIX,
> > + .dcd_settings = 0,
> > + };
> > + }
> > +
> > + if (cxl_dcd_supported(mds)) {
> > + policy->dcd_settings = CXL_INT_MSI_MSIX;
> > + size_in += sizeof(policy->dcd_settings);
> > + }
>
> It seems there's a bug here that I found on one of our test machines. It's
> possible the card doesn't support
> DCD commands but does have the policy bit for DCD (i.e. CXL card is 3.0+), so
> the payload still needs to be
> large enough to include the DCD bit in that case. So, the size_in needs to
> always include dcd_settings but
> the actual policy setting should stay based on whether the card supports DCD.
> Hopefully that makes sense, let
> me know if it's not clear...
>
Yes that makes sense. Thank you for reporting!
>
> The first thing that I thought of for a solution is setting size_in based on
> the CXL card's DVSEC revision
> (i.e. size_in = 5 for CXL 3.0+, size_in = 4 otherwise). Not exactly a clean
> solution, but I'm not sure there's
> a way around it.
>
> Thanks,
> Ben
> >
Here is what I came up with:
In cxl_event_config(), we get the interrupt policy
from cxl_event_get_int_policy() before cxl_event_config_msgnums().
I added a return param to cxl_event_get_int_policy() to return the
actual size:
*policy_size = mbox_cmd.size_out
The value is passed through a new input parameter for policy_size in
cxl_event_config_msgnums() so it can use the actual size.
I am working my way through the reviews and hope to post v12 soon :3
Thanks,
Anisa
> > mbox_cmd = (struct cxl_mbox_cmd) {
> > .opcode = CXL_MBOX_OP_SET_EVT_INT_POLICY,
> > .payload_in = policy,
> > - .size_in = sizeof(*policy),
> > + .size_in = size_in,
> > };
> >
> > rc = cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
> > @@ -632,6 +657,30 @@ static int cxl_event_irqsetup(struct cxl_memdev_state
> > *mds,
> > return 0;
> > }
> >
> > +static int cxl_irqsetup(struct cxl_memdev_state *mds,
> > + struct cxl_event_interrupt_policy *policy,
> > + bool native_cxl)
> > +{
> > + struct cxl_dev_state *cxlds = &mds->cxlds;
> > + int rc;
> > +
> > + if (native_cxl) {
> > + rc = cxl_event_irqsetup(mds, policy);
> > + if (rc)
> > + return rc;
> > + }
> > +
> > + if (cxl_dcd_supported(mds)) {
> > + rc = cxl_event_req_irq(cxlds, policy->dcd_settings);
> > + if (rc) {
> > + dev_err(cxlds->dev, "Failed to get interrupt for DCD
> > event log\n");
> > + cxl_disable_dcd(mds);
> > + }
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static bool cxl_event_int_is_fw(u8 setting)
> > {
> > u8 mode = FIELD_GET(CXLDEV_EVENT_INT_MODE_MASK, setting);
> > @@ -657,18 +706,26 @@ static bool cxl_event_validate_mem_policy(struct
> > cxl_memdev_state *mds,
> > static int cxl_event_config(struct pci_host_bridge *host_bridge,
> > struct cxl_memdev_state *mds, bool irq_avail)
> > {
> > - struct cxl_event_interrupt_policy policy;
> > + struct cxl_event_interrupt_policy policy = { 0 };
> > + bool native_cxl = host_bridge->native_cxl_error;
> > int rc;
> >
> > /*
> > * When BIOS maintains CXL error reporting control, it will process
> > * event records. Only one agent can do so.
> > + *
> > + * If BIOS has control of events and DCD is not supported skip event
> > + * configuration.
> > */
> > - if (!host_bridge->native_cxl_error)
> > + if (!native_cxl && !cxl_dcd_supported(mds))
> > return 0;
> >
> > if (!irq_avail) {
> > dev_info(mds->cxlds.dev, "No interrupt support, disable event
> > processing.\n");
> > + if (cxl_dcd_supported(mds)) {
> > + dev_info(mds->cxlds.dev, "DCD requires interrupts,
> > disable DCD\n");
> > + cxl_disable_dcd(mds);
> > + }
> > return 0;
> > }
> >
> > @@ -676,10 +733,10 @@ static int cxl_event_config(struct pci_host_bridge
> > *host_bridge,
> > if (rc)
> > return rc;
> >
> > - if (!cxl_event_validate_mem_policy(mds, &policy))
> > + if (native_cxl && !cxl_event_validate_mem_policy(mds, &policy))
> > return -EBUSY;
> >
> > - rc = cxl_event_config_msgnums(mds, &policy);
> > + rc = cxl_event_config_msgnums(mds, &policy, native_cxl);
> > if (rc)
> > return rc;
> >
> > @@ -687,11 +744,16 @@ static int cxl_event_config(struct pci_host_bridge
> > *host_bridge,
> > if (rc)
> > return rc;
> >
> > - rc = cxl_event_irqsetup(mds, &policy);
> > + rc = cxl_irqsetup(mds, &policy, native_cxl);
> > if (rc)
> > return rc;
> >
> > - cxl_mem_get_event_records(mds, CXLDEV_EVENT_STATUS_ALL);
> > + if (native_cxl)
> > + cxl_mem_get_event_records(mds, CXLDEV_EVENT_STATUS_ALL);
> > +
> > + dev_dbg(mds->cxlds.dev, "Event config : %s DCD %s\n",
> > + native_cxl ? "OS" : "BIOS",
> > + cxl_dcd_supported(mds) ? "supported" : "not supported");
> >
> > return 0;
> > }
>
