Commit f316cdff8d67 ("clk: Annotate struct clk_hw_onecell_data with
__counted_by") annotated the hws member of 'struct clk_hw_onecell_data'
with __counted_by, which informs the bounds sanitizer (UBSAN_BOUNDS)
about the number of elements in .hws[], so that it can warn when .hws[]
is accessed out of bounds. As noted in that change, the __counted_by
member must be initialized with the number of elements before the first
array access happens, otherwise there will be a warning from each access
prior to the initialization because the number of elements is zero.
This occurs in ipq_cmn_pll_register_clks() due to .num being assigned
only after the fixed rate output clocks and the CMN PLL clock have been
stored in .hws[]. If registering one of the fixed rate clocks fails, the
unwind loop under unregister_fixed_clk reads .hws[] while .num is still
zero as well. With CONFIG_UBSAN_BOUNDS and a compiler that implements
__counted_by (GCC 15.1+ or Clang 20.1+), this triggers an
array-index-out-of-bounds report during probe, and with
CONFIG_UBSAN_TRAP the first store traps so the CMN PLL clocks are never
provided.Move the .num initialization to right after the allocation. Cc: [email protected] Fixes: f81715a4c87c ("clk: qcom: Add CMN PLL clock controller driver for IPQ SoC") Assisted-by: LLM Signed-off-by: Aamir Ahmed <[email protected]> --- Found while auditing the remaining clk_hw_onecell_data users that assign .num only after touching .hws[], following the fixes already merged for clk-s2mps11 (3e14c7207a97), exynos-clkout (cf33f0b7df13) and clk-raspberrypi (6dc445c19050). The audit, the fix and this changelog were drafted with an LLM assistant and reviewed by hand. Compile-tested only (W=1, no warnings) on x86_64 with GCC 13.3, via COMPILE_TEST with CONFIG_IPQ_CMN_PLL=m. GCC 13.3 does not implement __counted_by (CC_HAS_COUNTED_BY needs GCC 15.1+ or Clang 20.1+), so the build only confirms that the change compiles; the sanitizer path was not exercised. I do not have the hardware, so this is not runtime-tested and no UBSAN report was captured. Based on v7.3-rc1. Checked against the pending IPQ5210 CMN PLL series (v3, 2026-08-14): no changed lines overlap, and the fix is still needed after its first patch removes the unwind path. drivers/clk/qcom/ipq-cmn-pll.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/ipq-cmn-pll.c b/drivers/clk/qcom/ipq-cmn-pll.c index dafe8c1738d..a9abad9ff4e 100644 --- a/drivers/clk/qcom/ipq-cmn-pll.c +++ b/drivers/clk/qcom/ipq-cmn-pll.c @@ -380,6 +380,8 @@ static int ipq_cmn_pll_register_clks(struct platform_device *pdev) if (!hw_data) return -ENOMEM; + hw_data->num = num_clks + 1; + /* * Register the CMN PLL clock, which is the parent clock of * the fixed rate output clocks. @@ -406,7 +408,6 @@ static int ipq_cmn_pll_register_clks(struct platform_device *pdev) * is configured to 12 GHZ by DT property assigned-clock-rates-u64. */ hw_data->hws[CMN_PLL_CLK] = cmn_pll_hw; - hw_data->num = num_clks + 1; ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data); if (ret) base-commit: 654ae5d73c05bd2943d65636ce6cd0aa46e62f18 -- 2.53.0.windows.1
