On Wed, Oct 07, 2026 at 01:16:33PM -0700, Anisa Su wrote: > These are the first eight patches of the Dynamic Capacity Device (DCD) > series. They set up: DCD enumeration, CDAT handling for DC partitions, > the event interrupt plumbing, a preparatory refactor, and > documentation of the DPA partition layout. They stand alone and keep DCD > disabled. They are not dependent on the rest of the series. > > Patch 1 detects the 48h command set and then leaves mds->dcd_supported > false. The flag is only turned on by the series that adds DCD event > handling, so every DCD specific path added here is shut off at runtime: > cxl_configure_dcd() never runs, no DC partition is created, no DCD > interrupt is armed, and the CXL_PARTMODE_DYNAMIC_RAM paths are > unreachable. The intent is to land the enumeration and plumbing while > the extent to DAX pipeline is still under review. > > Based on v7.3-rc6 > > v14: > https://lore.kernel.org/linux-cxl/[email protected]/T/#m0b6ade9da2d4fefa8aab3bb7db7c29516bc3f955 > [snip] > Testing > ======= > This series leaves mds->dcd_supported false on purpose, so > cxl_configure_dcd(), cxl_dev_dc_identify() and cxl_dc_check() are > unreachable at runtime as posted. The tests below are done with the rest > of the series on top, otherwise testing would not yield any meaningful > results. > > HW: > Waiting on results from partner team. > For the series:
Tested-by: Wonjae Lee <[email protected]> Tested-by: Junhee Park <[email protected]> Tested-by: Heesoo Kim <[email protected]> Test adding 1 extent/release to ensure interrupt configuration and DSMAS are read properly. FMAPI Add command is issued from BMC: busctl call xyz.openbmc_project.MCTP_SMBus_PCIe_slot \ /xyz/openbmc_project/mctp xyz.openbmc_project.MCTP.Base \ SendReceiveMctpMessagePayload yayq \ 9 101 \ 8 0 72 0 0 0x53 88 0 0 0 0 0 0 \ 0 1 84 0 0 72 0 4 0x56 72 0 0 0 0 0 0 \ 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \ 1 0 0 0 \ 0 0 0 0 1 0 0 0 \ 0 0 0 0x80 0 0 0 0 \ 0x7a 0x1d 0x4e 0x90 0xc3 0xb2 0x4f 0x57 0x8e 0x6d 0x21 0x5f 0x9a 0xb0 0xc4 0xd3 \ 0 0 \ 0 0 0 0 0 0 \ 100 To add 1 extent with 2GB size, tag=7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3 and shared sequence num = 0. The device is shareable, so adding fails without any tag or seq num. [Thu Oct 8 16:59:57 2026] cxl_core:cxl_mem_get_event_records:1875: cxl_pci 0000:0b:00.0: Reading event logs: 10 [Thu Oct 8 16:59:57 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0100 [Thu Oct 8 16:59:57 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 16:59:57 2026] cxl_core:cxl_handle_dcd_event_records:1779: cxl_pci 0000:0b:00.0: DCD event add : DPA:0x100000000 LEN:0x80000000 [Thu Oct 8 16:59:57 2026] cxl_core:cxl_extent_dc_partition:230: cxl_pci 0000:0b:00.0: DC extent DPA [range 0x0000000100000000-0x000000017fffffff] (DCR:[range 0x0000000000000000-0x0000001fffffffff])(7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 16:59:57 2026] cxl_core:cxl_extent_dc_partition:230: cxl_pci 0000:0b:00.0: DC extent DPA [range 0x0000000100000000-0x000000017fffffff] (DCR:[range 0x0000000000000000-0x0000001fffffffff])(7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 16:59:57 2026] cxl_core:cxl_extent_dc_partition:230: cxl_pci 0000:0b:00.0: DC extent DPA [range 0x0000000100000000-0x000000017fffffff] (DCR:[range 0x0000000000000000-0x0000001fffffffff])(7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 16:59:57 2026] cxl_core:__cxl_dpa_to_region:3100: cxl decoder9.0: dpa:0x100000000 mapped in region:region0 [Thu Oct 8 16:59:57 2026] cxl_core:cxl_add_extent:517: cxl decoder9.0: Add extent [range 0x0000000100000000-0x000000017fffffff] (7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 16:59:57 2026] cxl_core:cxlr_add_extent:444: cxl_dax_region dax_region0: Alloc new tag group [Thu Oct 8 16:59:57 2026] cxl_core:online_tag_group:732: extent0.3: dc_extent HPA [range 0x0000000100000000-0x000000017fffffff] (7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 16:59:57 2026] cxl_core:__cxlr_notify_extent:394: cxl_dax_region dax_region0: Trying notify: type 0 tag 7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3 [Thu Oct 8 16:59:57 2026] cxl_core:__cxlr_notify_extent:411: cxl_dax_region dax_region0: Notify: type 0 tag 7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3 [Thu Oct 8 16:59:57 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x4802 [Thu Oct 8 16:59:57 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 1ms [Thu Oct 8 16:59:57 2026] cxl_core:cxl_clear_event_record:1080: cxl_pci 0000:0b:00.0: Event log '4': Clearing 9 [Thu Oct 8 16:59:57 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0101 [Thu Oct 8 16:59:57 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 16:59:57 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0100 [Thu Oct 8 16:59:57 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 17:00:07 2026] cxl_core:cxl_mem_get_event_records:1875: cxl_pci 0000:0b:00.0: Reading event logs: 10 [Thu Oct 8 17:00:07 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0100 [Thu Oct 8 17:00:07 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 17:00:07 2026] cxl_core:cxl_handle_dcd_event_records:1779: cxl_pci 0000:0b:00.0: DCD event release : DPA:0x100000000 LEN:0x80000000 [Thu Oct 8 17:00:07 2026] cxl_core:__cxl_dpa_to_region:3100: cxl decoder9.0: dpa:0x100000000 mapped in region:region0 [Thu Oct 8 17:00:08 2026] cxl_core:__cxlr_notify_extent:394: cxl_dax_region dax_region0: Trying notify: type 1 tag 7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3 [Thu Oct 8 17:00:08 2026] cxl_core:__cxlr_notify_extent:411: cxl_dax_region dax_region0: Notify: type 1 tag 7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3 [Thu Oct 8 17:00:08 2026] cxl_core:dc_extent_unregister:528: extent0.3: DAX region rm extent HPA [range 0x0000000100000000-0x000000017fffffff] [Thu Oct 8 17:00:08 2026] cxl_core:cxled_release_extent:70: cxl decoder9.0: Remove extent [range 0x0000000100000000-0x000000017fffffff] (7a1d4e90-c3b2-4f57-8e6d-215f9ab0c4d3) [Thu Oct 8 17:00:08 2026] cxl_core:memdev_release_extent:1201: cxl_pci 0000:0b:00.0: Release response dpa [range 0x0000000100000000-0x000000017fffffff] [Thu Oct 8 17:00:08 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x4803 [Thu Oct 8 17:00:08 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 17:00:08 2026] cxl_core:cxl_clear_event_record:1080: cxl_pci 0000:0b:00.0: Event log '4': Clearing 11 [Thu Oct 8 17:00:08 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0101 [Thu Oct 8 17:00:08 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms [Thu Oct 8 17:00:08 2026] cxl_pci:__cxl_pci_mbox_send_cmd:264: cxl_pci 0000:0b:00.0: Sending command: 0x0100 [Thu Oct 8 17:00:08 2026] cxl_pci:cxl_pci_mbox_wait_for_doorbell:75: cxl_pci 0000:0b:00.0: Doorbell wait took 0ms > cxl_test: > ndctl's cxl suite against cxl_test (7.3.0-rc6, CXL as modules) > 16 of 17 pass, cxl-features.sh skips for lack of FWCTL, and > cxl-dcd.sh passes. > > QEMU: > Tested extent add/release and DAX device create/destroy. > Tested that expected errors are printed from malformed Get DC Configuration > payload. > > Anisa Su (1): > Documentation/cxl: Document DPA partition layout and ordering rules > > Ira Weiny (7): > cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) > cxl/mem: Read dynamic capacity configuration from the device > cxl/cdat: Gather DSMAS data for DCD partitions > cxl/events: Split event msgnum configuration from irq setup > cxl/pci: Factor out interrupt policy check > cxl/mem: Configure dynamic capacity interrupts > cxl/core: Enforce partition order/simplify partition calls > > .../driver-api/cxl/linux/cxl-driver.rst | 35 +++ > Documentation/driver-api/cxl/maturity-map.rst | 4 + > drivers/cxl/core/cdat.c | 97 +++++- > drivers/cxl/core/hdm.c | 24 +- > drivers/cxl/core/mbox.c | 285 ++++++++++++++++++ > drivers/cxl/core/memdev.c | 94 ++++-- > drivers/cxl/cxl.h | 14 +- > drivers/cxl/cxlmem.h | 88 +++++- > drivers/cxl/mem.c | 2 +- > drivers/cxl/pci.c | 176 +++++++++-- > include/cxl/cxl.h | 29 +- > tools/testing/cxl/test/mem.c | 2 +- > 12 files changed, 761 insertions(+), 89 deletions(-) > > > base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a > -- > 2.43.0 >
