From: Junyi Zhao <[email protected]> Add a devicetree binding schema for the A9 I3C controller.
The binding describes the controller instance and its bus-specific properties required for driver probing. Signed-off-by: Junyi Zhao <[email protected]> --- .../devicetree/bindings/i3c/amlogic,i3c-a9.yaml | 102 +++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/Documentation/devicetree/bindings/i3c/amlogic,i3c-a9.yaml b/Documentation/devicetree/bindings/i3c/amlogic,i3c-a9.yaml new file mode 100644 index 000000000..8e25122c6 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/amlogic,i3c-a9.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2026 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/amlogic,i3c-a9.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic A9 I3C master controller + +maintainers: + - Junyi Zhao <[email protected]> + +description: + The Amlogic A9 SoC family embeds an I3C master controller based on the + Silvaco I3C Dual-Role Master IP, with Amlogic specific glue logic. + +allOf: + - $ref: /schemas/i3c/i3c.yaml# + +properties: + compatible: + enum: + - amlogic,i3c-a9 + - amlogic,i3c-ao-a9 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +if: + properties: + compatible: + const: amlogic,i3c-a9 +then: + properties: + clocks: + items: + - description: APB peripheral clock + - description: I3C fast clock + clock-names: + items: + - const: pclk + - const: fast_clk +else: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: fast_clk + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + i3c@3a7000 { + compatible = "amlogic,i3c-a9"; + reg = <0x3a7000 0x10000>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clkc 15>, + <&clkc 16>; + clock-names = "pclk", "fast_clk"; + status = "disabled"; + }; + + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + i3c@22000 { + compatible = "amlogic,i3c-ao-a9"; + reg = <0x22000 0x10000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clkc 17>; + clock-names = "fast_clk"; + status = "disabled"; + }; +... -- 2.42.0
