On Mon, Aug 20, 2012 at 10:25:42AM +0200, Stephane Eranian wrote:
> On Mon, Jul 9, 2012 at 10:37 PM, Jiri Olsa <jo...@redhat.com> wrote:
SNIP
> > +static ssize_t event_sysfs_data(char *page, u64 config)
> > +{
> > + u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) |
> > + (config & AMD64_EVENTSEL_EVENT) >> 24;
> > + u64 umask = (config & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
> > + u64 inv = (config & ARCH_PERFMON_EVENTSEL_INV) >> 23;
> > + u64 cmask = (config & ARCH_PERFMON_EVENTSEL_CMASK) >> 24;
> > + ssize_t ret;
> > +
> > + /*
> > + * We have whole page size to spend and just little data
> > + * to write, so we can safely use sprintf.
> > + */
> > + ret = sprintf(page, "event=0x%02llx", event);
> > +
> > + if (umask)
> > + ret += sprintf(page + ret, ",umask=0x%02llx", umask);
> > +
> > + if (inv)
> > + ret += sprintf(page + ret, ",inv");
> > +
> > + if (cmask)
> > + ret += sprintf(page + ret, ",cmask=0x%02llx", cmask);
> > +
>
> You are not handling the model specific modifiers such as any_thread on Intel.
> It's not used right now. But you should handle the case now. That will avoid
> problems in the future.
ok, will add those
>
> > + ret += sprintf(page + ret, "\n");
> > +
> > + return ret;
> > +}
SNIP
> > static const struct attribute_group *x86_pmu_attr_groups[] = {
> > &x86_pmu_attr_group,
> > &x86_pmu_format_group,
> > + &x86_pmu_events_group,
> > NULL,
> > };
> >
> You are not checking whether or not the generic event is even available on the
> host core PMU. You don't want to expose generic events which are not
> available.
thats what patch 2 does
> And if you do this, then you need to take care of the other arch as well. They
> also deserve the extended syntax.
hm, I could try to add something for ppc, but that's where my arch
hw availability ends
thanks,
jirka
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