Actually, there are some minor problems here (both patches merged,
ixp4xx only):
Arnd Bergmann <a...@arndb.de> writes:
> --- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
> +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
> @@ -37,7 +38,7 @@
>
> static inline u32 ixp4xx_read_feature_bits(void)
> {
> - u32 val = ~*IXP4XX_EXP_CFG2;
> + u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
>
This is all fine, but
> @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
>
> static inline void ixp4xx_write_feature_bits(u32 value)
> {
> - *IXP4XX_EXP_CFG2 = ~value;
> + __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
> }
The EXP_CFG2 register is already in host order, no need for
cpu_to_le32() as the replaced code clearly shows.
Can you merge both IXP4xx parts (in the two patches) and fix the above,
please? Thanks.
--
Krzysztof Halasa
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