On Tue, Oct 02, 2012 at 06:27:41PM -0400, David Miller wrote: > > Invalidation sequences are handled in various ways on various > architectures. > > One way, which sparc64 uses, is to let the set_*_at() functions > accumulate pending flushes into a per-cpu array. Then the > flush_tlb_range() et al. calls process the pending TLB flushes. > > In this regime, the __tlb_remove_*tlb_entry() implementations are > essentially NOPs. > > The canonical PTE zap in mm/memory.c is: > > ptent = ptep_get_and_clear_full(mm, addr, pte, > tlb->fullmm); > tlb_remove_tlb_entry(tlb, pte, addr); > > With a subsequent tlb_flush_mmu() if needed. > > Mirror this in the THP PMD zapping using: > > orig_pmd = pmdp_get_and_clear(tlb->mm, addr, pmd); > page = pmd_page(orig_pmd); > tlb_remove_pmd_tlb_entry(tlb, pmd, addr); > > And we properly accomodate TLB flush mechanims like the one described > above.
Thanks for the explanation. Reviewed-by: Andrea Arcangeli <aarca...@redhat.com> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
