On Tue, 2012-10-09 at 17:38 +0200, Andre Przywara wrote: > First you need an AMD family 10h/12h CPU. These do not reset the > PERF_CTR registers on a reboot. > Now you boot bare metal Linux, which goes successfully through this > check, but leaves the magic value of 0xabcd in the register. You > don't use the performance counters, but do a reboot (warm reset). > Then you choose to boot Xen. The check will be triggered with a > recent Linux kernel as Dom0 again, trying to write 0xabcd into the > MSR. Xen silently drops the write (expected), but the subsequent read > will return the value in the register, which just happens to be the > expected magic value. Thus the test misleadingly succeeds, leaving > the kernel in the belief that the PMU is available
Wow.. ! that's uhm.. shees! Bit weird of Xen to trap writes but not reads of MSRs though. The patchs looks fine though, thanks! -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/