On 14.11.2012 10:49, Thierry Reding wrote:
> Can you find out how the host1x clock is setup without this change? I
> was told that freezes can occur when you try to access the registers
> without the host1x clock being enabled. However, the host1x driver
> should take care to properly setup the clock.
>
> To find out if the non-running clock is the issue, can you try to patch
> that line and make the final element true instead of false? That should
> enable the clock on boot so that it should always be running.
I tried with fastboot and U-Boot, and whenever that line is there,
kernel boot will halt at nvhost init. Same happens if I just change the
false to true.
nvhost will enable the clock and disable as it need. Also, part of
host1x initialization did proceed, but it ended up hanging after a few
registers were initialized. So it's not a case of host1x being off, but
host1x hanging after a while.
If I change this line to:
{ "host1x", "pll_p", 216000000, false },
it will also work properly. It looks like we have some problem with
pll_c in Tegra20, or clock configuration with your patch. In Tegra30,
pll_c with 144MHz seems to work fine, but on Tegra20, it doesn't.
In internal kernel, we use pll_c for host1x, so hardware shouldn't be
the problem here.
Best regards,
Terje
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