On Mon, Dec 03, 2012 at 04:44:11PM +0000, Armando Visconti wrote:
> On 11/29/2012 12:04 PM, Armando VISCONTI wrote:
> > This patch keeps disabled the strict alignment CP15 bit for
> > all armv6 and armv7 processor without the mmu. This behaviour
> > is now same as in the mmu case.
> >
> > Signed-off-by: Armando Visconti<armando.visco...@st.com>
> > ---
> >   arch/arm/kernel/head-nommu.S |    2 +-
> >   1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
> > index 278cfc1..2c228a0 100644
> > --- a/arch/arm/kernel/head-nommu.S
> > +++ b/arch/arm/kernel/head-nommu.S
> > @@ -68,7 +68,7 @@ __after_proc_init:
> >      * CP15 system control register value returned in r0 from
> >      * the CPU init function.
> >      */
> > -#ifdef CONFIG_ALIGNMENT_TRAP
> > +#if defined(CONFIG_ALIGNMENT_TRAP)&&  __LINUX_ARM_ARCH__<  6
> >     orr     r0, r0, #CR_A
> >   #else
> >     bic     r0, r0, #CR_A
> 
> Any feedback on this simple patch?

Although this is correct, you still need some extra patches to avoid
unaligned accesses to strongly-ordered memory (given that we don't
currently have mainline support for the MPU). Take a look at my nommu/fixes
branch:

  
https://git.kernel.org/?p=linux/kernel/git/will/linux.git;a=shortlog;h=refs/heads/nommu/fixes

I'm happy to post some of that if it's useful to you.

Will
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