On 12/17/2012 12:51 PM, Wolfgang Grandegger wrote: >>> Without having an AT91 available right now, I guess the hardware >>> interface of this GPIO chip is different from the GPIO block API. While >>> the hardware has clear and set registers, the val parameter of >>> at91_gpiolib_set_block() should be interpreted as the actual output >>> values. See lpc32xx_gpo_set_block() for an example for handling set and >>> clear registers like this: First, set_bits and clear_bits words are >>> calculated from mask and val parameters, and finally written to the >>> respective hardware registers. >>> >>> Note that one .set_block() can result in writing both the set and clear >>> registers of the hardware when val contains both 0s and 1s in >>> respectively masked positions. >> >> Oops, I obviously did not test GPIO block write. The patch below does >> work now. Feel free to add it to the next version of your series. > > The patch lacks an important fix, sorry. Please consider the updated > patch below.
Thanks! And I guess Russell is right: If possible, we should write outputs simultaneously via ODSR (plus OWER/OWDR/OWSR) instead of separate set/clear. I wonder if we need to save/restore the state of OWSR at every write operation or if we need/can cache it. Assuming that block GPIO are the only code in the kernel that manipulates ODSR. Further: Can we include this patch for arch/arm/mach-at91 via the gpio subsystem or does it need to go separately via arm-soc.git? Thanks, Roland -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
