On Fri, 6 Apr 2001, Ivan Kokshaysky wrote:
> > Memory barriers are a separate issue. On the alpha the
> > natural way to implement it would be in the page table fill code.
> > Memory barriers are o.k. but the really don't help the case when what
> > you want to do is read the latest value out of a pci register.
>
> You don't need memory barrier for that. "Write memory barriers" are
> used to ensure correct write order, and "memory barriers" are used
> to ensure that all pending reads/writes will complete before next read
> or write.
You do. PCI-space registers are volatile and they may change depending
on what was written (or read) previously. A memory barrier before a PCI
read will ensure you get a value that is relevant to previous code
actions. Without a barrier you may get pretty anything, depending on
which of previous writes managed to complete before.
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: [EMAIL PROTECTED], PGP key available +
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