From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
Signed-off-by: Jacob Shin <jacob.s...@amd.com>
---
tools/perf/Documentation/perf-record.txt | 14 ++++++++++----
tools/perf/util/parse-events.c | 2 +-
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index d4da111..48a7587 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -33,13 +33,19 @@ OPTIONS
- a raw PMU event (eventsel+umask) in the form of rNNN where NNN is a
hexadecimal event descriptor.
- - a hardware breakpoint event in the form of '\mem:addr[:access]'
- where addr is the address in memory you want to break in.
- Access is the memory access type (read, write, execute) it can
- be passed as follows: '\mem:addr[:[r][w][x]]'.
+ - a hardware breakpoint event in the form of
+ '\mem:addr[:access][:addr_mask]' where addr is the address in
+ memory you want to break in. Access is the memory access type (read,
+ write, execute) it can be passed as follows: '\mem:addr[:[r][w][x]]'.
+ addr_mask is the "don't care" bit mask to further qualify the given
+ addr, to break in on accesses to an address range.
+
If you want to profile read-write accesses in 0x1000, just set
'mem:0x1000:rw'.
+ If you want to profile write accesses in [0x1000 ~ 0x1010), just set
+ 'mem:0x1000:w:0xf'. (Only supported on some hardware)
+
--filter=<filter>::
Event filter.
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 0744895..93d0c9c 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -1148,7 +1148,7 @@ void print_events(const char *event_glob, bool name_only)
printf("\n");
printf(" %-50s [%s]\n",
- "mem:<addr>[:access]",
+ "mem:<addr>[:access][:addr_mask]",
event_type_descriptors[PERF_TYPE_BREAKPOINT]);
printf("\n");
}
--
1.7.9.5
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