Hi Jason, On 04/11/2013 08:12 PM, Jason Cooper wrote: > On Tue, Apr 09, 2013 at 12:52:13AM +0200, Gregory CLEMENT wrote: >> From: Lior Amsalem <al...@marvell.com> >> >> In order to be able to use more than 4GB address-cells and size-cells >> have to be set to 2 >> >> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> >> Signed-off-by: Lior Amsalem <al...@marvell.com> >> --- >> arch/arm/boot/dts/skeleton64.dtsi | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> create mode 100644 arch/arm/boot/dts/skeleton64.dtsi > > Applied to mvebu/dt > > Gregory, > > Once I can pull in Thomas' pci work, you'll just need to rebase patches > 1, and 6 - 9 against mvebu/dt. >
Yes sure! When did you plan to pull the dts part of Thomas' pci work? Is there still anything left to prevent to pull this part? Thanks, -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
