On Sat, Jun 01, 2013 at 11:39:41PM -0700, Stephen Boyd wrote:
> The ARM architected system counter has at least 56 useable bits.
> Add support for counters with more than 32 bits to the generic
> sched_clock implementation so we can avoid the complexity of
> dealing with wrap-around on these devices while benefiting from
> the irqtime accounting and suspend/resume handling that the
> generic sched_clock code already has.
This looks like a horrid hack to me.
> +static unsigned long long notrace sched_clock_64(void)
> +{
> + u64 cyc = read_sched_clock_64() - cd.epoch_ns;
> + return cyc * cd.mult;
So, the use of cd.mult implies that the return value from
read_sched_clock_64() is not nanoseconds but something else. But then
we subtract it from the nanoseconds epoch - which has to be nanoseconds
because you simply return that when suspended.
> +}
> +
> +void __init
> +setup_sched_clock_64(u64 (*read)(void), int bits, unsigned long rate)
> +{
> + if (cd.rate > rate)
> + return;
> +
> + BUG_ON(bits <= 32);
> + WARN_ON(!irqs_disabled());
> + read_sched_clock_64 = read;
> + sched_clock_func = sched_clock_64;
> + cd.rate = rate;
> + cd.mult = NSEC_PER_SEC / rate;
Here, you don't check that the (2^bits) * mult results in a wrap of the
resulting 64-bit number, which is a _basic_ requirement for sched_clock
(hence all the code for <=32bit clocks, otherwise we wouldn't need this
complexity in the first place.)
So, I think this whole approach is broken.
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