On Monday 17 June 2013 15:30:21 Russell King - ARM Linux wrote:
> > > diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
> > > index d217e97..85280b1 100644
> > > --- a/arch/arm/mm/proc-fa526.S
> > > +++ b/arch/arm/mm/proc-fa526.S
> > > @@ -81,9 +81,7 @@ ENDPROC(cpu_fa526_reset)
> > > */
> > > .align 4
> > > ENTRY(cpu_fa526_do_idle)
> > > - mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
> > > - mov pc, lr
> > > -
> > > + nop
>
> It replaces the WFI and return with a pure nop, so we will fall through
> to cpu_fa526_dcache_clean_area(). Do we really want to clean a random
> D cache entry depending on what r0 happened to hold at this point? I
> think not...
Right, I should have actually read the change...
Arnd
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