On Friday 12 July 2013 05:30 AM, Jingoo Han wrote: > On Thursday, July 11, 2013 5:55 PM, Kishon Vijay Abraham I wrote: >> On Thursday 11 July 2013 11:19 AM, Jingoo Han wrote: >>> Exynos PCIe IP consists of Synopsys specific part and Exynos >>> specific part. Only core block is a Synopsys designware part; >>> other parts are Exynos specific. >>> Also, the Synopsys designware part can be shared with other >>> platforms; thus, it can be split two parts such as Synopsys >>> designware part and Exynos specific part. >>> >>> Signed-off-by: Jingoo Han <jg1....@samsung.com> >>> Cc: Pratyush Anand <pratyush.an...@st.com> >>> Cc: Mohit KUMAR <mohit.ku...@st.com> >>> --- >> . >> . >> <snip> >> . >> . >>> + >>> +/* Exynos PCIe driver does not allow module unload */ >> >> Just curious, why is this restriction? > > CC'ed Thierry Reding, > > Hi Kishon, > > That's a good question. > > Now, we don't have the solution to "be able to load and unload > the PCI host driver in a loop definitely without crashing or exposing > any races or leaks", as Arnd Bergmann said. > Please refer to the following thread in mailing-list. > (http://archive.arm.linux.org.uk/lurker/message/20130614.123849.4ff363c5.pl.html)
That explains. Thanks Kishon -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
