On Tue, Jul 23, 2013 at 6:57 PM, Peter Zijlstra <[email protected]> wrote: > On Tue, Jul 23, 2013 at 06:13:34PM +0200, Andi Kleen wrote: >> On Tue, Jul 23, 2013 at 10:38:34AM +0200, Peter Zijlstra wrote: >> > On Thu, Jul 18, 2013 at 04:03:39PM -0700, Andi Kleen wrote: >> > > From: Andi Kleen <[email protected]> >> > > >> > > [The patch to enable this in the user tools has been sent separately] >> > > >> > > With the earlier patches to automatically try cpu// and add >> > > a precise sys attribute, we can now enable PEBS for the mem-loads, >> > > mem-stores events everywhere. >> > > >> > > This allows to use >> > > >> > > perf record -e mem-loads ... >> > > >> > > instead of >> > > >> > > perf record -e cpu/mem-loads/p ... >> > > >> > > Always use precise=2 even though it is costly pre-Haswell >> > >> > This Changelog fails to give a reason _why_ we'd want to do this. >> >> The first is much nicer to type and understand? Just in the spirit of >> making perf easier to use. > > And here I was thinking that maybe these events don't make sense without > pebs or so. But no, rather than giving an actual useful reason you'd > have me look things up myself. *sigh*
The loads events using LATENCY_ABOVE_THRESHOLD do not count anything without PEBS (that's for all processors pre-Haswell). As for forcing precise=2, I think that is what people would expect, i.e., point me to the load/store instruction. Experts can still force precise=1 because I think the parser uses the value of the last precise= instance. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
