Hi, Does somebody know why arch/x86/kernel/cpu/intel.c has tlb_flushall_shift detection logic for Ivy Bridge CPU family but not for Haswell? Maybe intel_cacheinfo.c needs to be checked for Haswell updates too.
Regards, Ilari Stenroth -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/