Hi Mike, as we discussed with Kevin in my arm-soc pull request I should send these two patches separately and directly to you. I have rebased them on 3.11-rc2 which is the kernel version you have in your clk-next branch. Thanks for pulling them.
Thanks, Michal The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b: Linux 3.11-rc2 (2013-07-21 12:05:29 -0700) are available in the git repository at: git://git.xilinx.com/linux-xlnx.git tags/zynq-clk-for-3.12 for you to fetch changes up to 353dc6c47d67c83f7cc20334f8deb251674e6864: clk/zynq/pll: Use #defines for fbdiv min/max values (2013-08-20 07:54:41 +0200) ---------------------------------------------------------------- arm: Xilinx Zynq clock changes for v3.12 Just small two changes where the first fixes documentation and the second improves code readability. ---------------------------------------------------------------- Soren Brinkmann (2): clk/zynq/pll: Fix documentation for PLL register function clk/zynq/pll: Use #defines for fbdiv min/max values drivers/clk/zynq/pll.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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