Hi Arnd, 2013/12/3 Arnd Bergmann <[email protected]>: > >> + addr = ioremap(BPHYSADDR(BCHP_IRQ0_IRQEN), sizeof(u32)); >> + writel_relaxed(BCHP_IRQ0_IRQEN_uarta_irqen_MASK >> + | BCHP_IRQ0_IRQEN_uartb_irqen_MASK >> + | BCHP_IRQ0_IRQEN_uartc_irqen_MASK, addr); >> + iounmap(addr); > > What does this part do? Isn't that something that should have been set > up by the boot loader?
The bootloader will typically use the UART in busy-looping mode and not rely on interrupts, also the bootloader currently does not know much about how many UARTs there are in the system and how they are going to be used. One possible way to solve this would be to write a very small irqchip driver which only implements the "irq_enable" method to allow these interrupts to be forwarded to the GIC. Somewhere in the Device Tree we would have an interrupt-map property which describes the mapping between the bits in BCHP_IRQ0_IRQEN and their corresponding peripherals (UARTA, B, C). Would that work? -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
