lör 2014-01-18 klockan 05:46 -0800 skrev Boris BREZILLON: > Do you know which mode are used (X ECC strength / 512 or 1024 bytes ?) > and > when they are are selected (does it depend on the connected NAND > chip ?) ?
It seems to blindly try some modes until something usable is found. Varying both chip address size and ECC layout. Sorry I do not have the exact details on the ECC modes used. Only analyzed nand controller command traces of A13 BROM trying to load boot0. The trace can be found at https://github.com/hno/Allwinner-Info/blob/master/NAND/boot0/A13-brom > > > > - boot0 code is stored only on the first ECC block of each > page (1024 > > bytes + ecc bytes) > > No, it reads a whole page at a time in sequental mode > (data,ecc,data,ecc,data,ecc,data,ecc...). > > > Are you sure ? > This thread says that only the first 1024 bytes of data (+ 96 bytes of > ECC) of each page are used: yes I am sure. There was no page access commands between the sectors, only linear read of data,ecc,data,ecc. > I'm not a big fan of this approach, because the real media is an MTD > (NAND) device, > not a block device. Hit implementation acks this by not providing a block device. > iirc there is an interface for dynamically selecting ECC mode > and other > parameers. Or maybe that's only u-boot mtd? > > > Haven't found anything authorizing per partiton ECC config, though > this could be an > enhancement of the MTD framework. u-boot have user selectable ecc scheme for some boards. I.e. omap3 based ones. other boards select based on NAND size etc. Regards Henrik -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
