On Thu, Feb 06, 2014 at 02:19:52PM -0600, Scott Wood wrote: > On Thu, 2014-02-06 at 18:37 +0100, Torsten Duwe wrote: > > On Thu, Feb 06, 2014 at 05:38:37PM +0100, Peter Zijlstra wrote: > > > > Can you pair lwarx with sthcx ? I couldn't immediately find the answer > > > in the PowerISA doc. If so I think you can do better by being able to > > > atomically load both tickets but only storing the head without affecting > > > the tail.
Can I simply write the half word, without a reservation, or will the HW caches mess up the other half? Will it ruin the cache coherency on some (sub)architectures? > Plus, sthcx doesn't exist on all PPC chips. Which ones are lacking it? Do all have at least a simple 16-bit store? Torsten -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/